LSPP 2011 - Workshop on Large-Scale Parallel Processing
Topics/Call fo Papers
Workshop on Large-Scale Parallel Processing
to be held at the
IEEE International Parallel and Distributed Processing Symposium
Anchorage, Alaska
May 16th - 20th, 2011
The workshop on Large-Scale Parallel Processing is a forum that focuses on computer systems that utilize thousands of nodes and beyond. This is a very active area given the goals of many researchers world-wide to enhance science-by-simulation through installing large-scale exa-flop systems within the next eight years. Large-scale systems, referred to by some as extreme-scale and ultra-scale, have many important research aspects that need detailed examination in order for their effective design, deployment, and utilization to take place. These include handling the substantial increase in multi-core on a chip, the ensuing interconnection hierarchy, communication, and synchronization mechanisms. Increasingly this is becoming an issue of co-design involving performance, power and reliability aspects. The workshop aims to bring together researchers from different communities working on challenging problems in this area for a dynamic exchange of ideas. Work at early stages of development as well as work that has been demonstrated in practice is equally welcome.
Of particular interest are papers that identify and analyze novel ideas rather than providing incremental advances in the following areas:
Large-scale systems: exploiting parallelism at large-scale, the coordination of large numbers of processing elements, synchronization and communication at large-scale, programming models and productivity
Multi-core: utilization of increased parallelism on a single chip (MPP on a chip such as the Cell and GPUs), the possible integration of these into large-scale systems, and dealing with the resulting hierarchical connectivity.
Novel architectures and experimental systems : the design of novel systems, the use of processors in memory (PIMS), parallelism in emerging technologies, future trends.
Applications: novel algorithmic and application methods, experiences in the design and use of applications that scale to large-scales, overcoming of limitations, performance analysis and insights gained.
Results of both theoretical and practical significance will be considered, as well as work that has demonstrated impact at small-scale that will also affect large-scale systems. Work may involve algorithms, languages, various types of models, or hardware. A list of papers presented at previous LSPP workshops can be found here.
Selected work presented at the workshop will be published in a special issue of Parallel Processing Letters in late 2011. Special issues of Parallel Processing Letters from LSPP workshops previously appeared in December 2010, 2009 and 2008.
Submission Guidelines
Papers should not exceed eight single-space pages (including figures, tables and references) using a 12-point on 8?x11-inch pages. Submissions in PostScript or PDF should be made using EDAS. Informal enquiries can be made to Darren Kerbyson. Submissions will be judged on correctness, originality, technical strength, significance, presentation quality and appropriateness. Submitted papers should not have appeared in or under consideration for another venue.
Important Dates
Submission opens: October 1st 2010
Papers due: December 23rd 2010
Notification of acceptance: February 2nd 2011
Camera-Ready Papers due: February 21st 2011
Workshop Organization
Workshop Co-chairs
Darren J. Kerbyson Pacific Northwest National Laboratory
Ram Rajamony IBM Austin Research Lab
Charles Weems University of Massachusetts
Additional Steering Committee Members
Johnnie Baker Kent State University
Alex Jones University of Pittsburgh
H.J. Siegel Colorado State University
Provisional Program Committee
Ghoerge Almasi IBM T.J. Watson Research Lab
Taisuke Boku University of Tsukuba, Japan
I-Hsin Chung IBM T.J. Watson Research Lab
Marco Daneluto University of Pisa
Martin Herbordt Boston University
Lei Huang University of Houston
Daniel Katz University of Chicago
Jesus Labarta Barcelona Supercomputing Center, Spain
John Michalakes National Renewable Energy Laboratory, USA
Celso Mendes University of Illinois Urbana-Champagne
Bernd Mohr Forschungszentrum Juelich, Germany
Stathis Papaefstathiou Microsoft Research
Michael Scherger Texas A&M University-Corpus Christi
Gerhard Wellein University of Erlangen, Germany
Pat Worley Oak Ridge National Laboratory
Workshop General Chair and point of contact: Darren J. Kerbyson
to be held at the
IEEE International Parallel and Distributed Processing Symposium
Anchorage, Alaska
May 16th - 20th, 2011
The workshop on Large-Scale Parallel Processing is a forum that focuses on computer systems that utilize thousands of nodes and beyond. This is a very active area given the goals of many researchers world-wide to enhance science-by-simulation through installing large-scale exa-flop systems within the next eight years. Large-scale systems, referred to by some as extreme-scale and ultra-scale, have many important research aspects that need detailed examination in order for their effective design, deployment, and utilization to take place. These include handling the substantial increase in multi-core on a chip, the ensuing interconnection hierarchy, communication, and synchronization mechanisms. Increasingly this is becoming an issue of co-design involving performance, power and reliability aspects. The workshop aims to bring together researchers from different communities working on challenging problems in this area for a dynamic exchange of ideas. Work at early stages of development as well as work that has been demonstrated in practice is equally welcome.
Of particular interest are papers that identify and analyze novel ideas rather than providing incremental advances in the following areas:
Large-scale systems: exploiting parallelism at large-scale, the coordination of large numbers of processing elements, synchronization and communication at large-scale, programming models and productivity
Multi-core: utilization of increased parallelism on a single chip (MPP on a chip such as the Cell and GPUs), the possible integration of these into large-scale systems, and dealing with the resulting hierarchical connectivity.
Novel architectures and experimental systems : the design of novel systems, the use of processors in memory (PIMS), parallelism in emerging technologies, future trends.
Applications: novel algorithmic and application methods, experiences in the design and use of applications that scale to large-scales, overcoming of limitations, performance analysis and insights gained.
Results of both theoretical and practical significance will be considered, as well as work that has demonstrated impact at small-scale that will also affect large-scale systems. Work may involve algorithms, languages, various types of models, or hardware. A list of papers presented at previous LSPP workshops can be found here.
Selected work presented at the workshop will be published in a special issue of Parallel Processing Letters in late 2011. Special issues of Parallel Processing Letters from LSPP workshops previously appeared in December 2010, 2009 and 2008.
Submission Guidelines
Papers should not exceed eight single-space pages (including figures, tables and references) using a 12-point on 8?x11-inch pages. Submissions in PostScript or PDF should be made using EDAS. Informal enquiries can be made to Darren Kerbyson. Submissions will be judged on correctness, originality, technical strength, significance, presentation quality and appropriateness. Submitted papers should not have appeared in or under consideration for another venue.
Important Dates
Submission opens: October 1st 2010
Papers due: December 23rd 2010
Notification of acceptance: February 2nd 2011
Camera-Ready Papers due: February 21st 2011
Workshop Organization
Workshop Co-chairs
Darren J. Kerbyson Pacific Northwest National Laboratory
Ram Rajamony IBM Austin Research Lab
Charles Weems University of Massachusetts
Additional Steering Committee Members
Johnnie Baker Kent State University
Alex Jones University of Pittsburgh
H.J. Siegel Colorado State University
Provisional Program Committee
Ghoerge Almasi IBM T.J. Watson Research Lab
Taisuke Boku University of Tsukuba, Japan
I-Hsin Chung IBM T.J. Watson Research Lab
Marco Daneluto University of Pisa
Martin Herbordt Boston University
Lei Huang University of Houston
Daniel Katz University of Chicago
Jesus Labarta Barcelona Supercomputing Center, Spain
John Michalakes National Renewable Energy Laboratory, USA
Celso Mendes University of Illinois Urbana-Champagne
Bernd Mohr Forschungszentrum Juelich, Germany
Stathis Papaefstathiou Microsoft Research
Michael Scherger Texas A&M University-Corpus Christi
Gerhard Wellein University of Erlangen, Germany
Pat Worley Oak Ridge National Laboratory
Workshop General Chair and point of contact: Darren J. Kerbyson
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Last modified: 2010-10-07 11:32:59