MTAAP 2011 - MTAAP 2011 Workshop on Multithreaded Architectures and Applications
Topics/Call fo Papers
MTAAP 2011
Workshop on Multithreaded Architectures and Applications
http://ft.ornl.gov/events/mtaap11/
To be held in conjunction with the
25th IEEE International Parallel & Distributed Processing Symposium
May 16-20, 2011
Anchorage, Alaska USA
Theme
Multithreading (MT) programming and execution models, as well as hybrid programming with accelerated architectures, are starting to permeate the high-end and mainstream computing scene. This trend is driven by the need to increase processor utilization and deal with the memory-processor speed gap. Recent and upcoming examples architectures that fit this profile are Cray's XMT, IBM Cyclops, and several SMT processors from Sun (Victoria Falls), IBM (Power6, Power7), or Intel, as well as heterogeneous systems with accelerators such as GPGPUs from ATI, NVIDIA, and Intel. The underlying rationale to increase processor utilization is a varying mix of new metrics that take performance improvements as well as better power and cost budgeting into account. Yet, it remains a challenge to identify and productively program applications for these architectures with a resulting substantial performance improvement.
The MTAAP 2011 workshop is a full-day meeting to be held at the IPDPS 2011 focusing on Multithreading architectures and applications. This workshop intends to identify applications that are amenable to MT and the MT programming and execution models as well as the underlying architectures on which they can thrive. The workshop seeks to explore programming frameworks in the form of languages and libraries, compilers, analysis and debugging tools to increase the programming productivity. Topics of interest, of both theoretical and practical significance, include but are not limited to:
Multithreaded Architectures
Heterogeneous architectures including graphics processors and other architectures
Multithreaded Programming Framework
Compilation and Optimization for MT and heterogeneous architectures
Multithreaded Performance Analysis and Debugging Tools
Multithreaded Performance Metrics and Evaluations
Multithreaded Libraries and run-time systems
Innovative applications for MT architectures
The MTAAP workshop proceedings will be published along with the IPDPS proceedings.
Call for Papers
Paper Submission Guidelines
Submitted manuscripts may not exceed 15 single-spaced pages using 12-point size font on 8.5x11 inch pages, including figures, tables, and references. Please use the standard 1-inch margin. Authors may submit additional material as an appendix to their submission, but there is no guarantee that this material will influence the review process. Manuscripts must be submitted electronically and in PDF format. Submissions will be judged on correctness, originality, technical strength, significance, quality of presentation, and interest and relevance to the workshop attendees. Submitted papers may not have appeared in or be under consideration for another workshop, conference, or journal.
MTAAP submissions are being handled by EDAS system. To submit a paper, please use the following link (MTAAP EDAS) and follow the instructions.
Important Dates
Papers due: 24 Dec 2010
Notification of acceptance: 17 Jan 2011
Camera-ready due: 1 Feb 2011
Proceedings
The proceedings of this workshop will be published together with the proceedings of other IPDPS 2010 workshops by the IEEE Computer Society Press.
Workshop Archive
Information and papers from the earlier MTAAP workshops are available:
2010 MTAAP
2009 MTAAP
Workshop Organization
Chairs
Luiz DeRose (Cray) (ldr-AT-cray.com)
Jeffrey Vetter (ORNL and Georgia Tech) (vetter-AT-computer.org)
Tentative Program Committee
Sadaf Alam (CSCS)
David Bader (Georgia Tech)
Jonathan Berry (Sandia National Laboratory)
Daniel Chavarria (Pacific Northwest National Laboratory)
John Feo (Pacific Northwest National Laboratory)
Guang Gao (U. Delaware)
Bruce Hendrickson (Sandia National Laboratory)
Larry Kaplan (Cray)
Peter Kogge (Notre Dame)
Michael Merrill (DoD)
Jose Moreira (IBM)
P. Sadyappan (Ohio State)
Mateo Valero (Universitat Politecnica de Catalunya)
Additional Information
E-mail Contact
For more information on MTAAP or if you have any questions please contact the workshop chairs (e-mail addresses listed above).
This website is hosted by the ORNL Future Technologies Group.
Workshop on Multithreaded Architectures and Applications
http://ft.ornl.gov/events/mtaap11/
To be held in conjunction with the
25th IEEE International Parallel & Distributed Processing Symposium
May 16-20, 2011
Anchorage, Alaska USA
Theme
Multithreading (MT) programming and execution models, as well as hybrid programming with accelerated architectures, are starting to permeate the high-end and mainstream computing scene. This trend is driven by the need to increase processor utilization and deal with the memory-processor speed gap. Recent and upcoming examples architectures that fit this profile are Cray's XMT, IBM Cyclops, and several SMT processors from Sun (Victoria Falls), IBM (Power6, Power7), or Intel, as well as heterogeneous systems with accelerators such as GPGPUs from ATI, NVIDIA, and Intel. The underlying rationale to increase processor utilization is a varying mix of new metrics that take performance improvements as well as better power and cost budgeting into account. Yet, it remains a challenge to identify and productively program applications for these architectures with a resulting substantial performance improvement.
The MTAAP 2011 workshop is a full-day meeting to be held at the IPDPS 2011 focusing on Multithreading architectures and applications. This workshop intends to identify applications that are amenable to MT and the MT programming and execution models as well as the underlying architectures on which they can thrive. The workshop seeks to explore programming frameworks in the form of languages and libraries, compilers, analysis and debugging tools to increase the programming productivity. Topics of interest, of both theoretical and practical significance, include but are not limited to:
Multithreaded Architectures
Heterogeneous architectures including graphics processors and other architectures
Multithreaded Programming Framework
Compilation and Optimization for MT and heterogeneous architectures
Multithreaded Performance Analysis and Debugging Tools
Multithreaded Performance Metrics and Evaluations
Multithreaded Libraries and run-time systems
Innovative applications for MT architectures
The MTAAP workshop proceedings will be published along with the IPDPS proceedings.
Call for Papers
Paper Submission Guidelines
Submitted manuscripts may not exceed 15 single-spaced pages using 12-point size font on 8.5x11 inch pages, including figures, tables, and references. Please use the standard 1-inch margin. Authors may submit additional material as an appendix to their submission, but there is no guarantee that this material will influence the review process. Manuscripts must be submitted electronically and in PDF format. Submissions will be judged on correctness, originality, technical strength, significance, quality of presentation, and interest and relevance to the workshop attendees. Submitted papers may not have appeared in or be under consideration for another workshop, conference, or journal.
MTAAP submissions are being handled by EDAS system. To submit a paper, please use the following link (MTAAP EDAS) and follow the instructions.
Important Dates
Papers due: 24 Dec 2010
Notification of acceptance: 17 Jan 2011
Camera-ready due: 1 Feb 2011
Proceedings
The proceedings of this workshop will be published together with the proceedings of other IPDPS 2010 workshops by the IEEE Computer Society Press.
Workshop Archive
Information and papers from the earlier MTAAP workshops are available:
2010 MTAAP
2009 MTAAP
Workshop Organization
Chairs
Luiz DeRose (Cray) (ldr-AT-cray.com)
Jeffrey Vetter (ORNL and Georgia Tech) (vetter-AT-computer.org)
Tentative Program Committee
Sadaf Alam (CSCS)
David Bader (Georgia Tech)
Jonathan Berry (Sandia National Laboratory)
Daniel Chavarria (Pacific Northwest National Laboratory)
John Feo (Pacific Northwest National Laboratory)
Guang Gao (U. Delaware)
Bruce Hendrickson (Sandia National Laboratory)
Larry Kaplan (Cray)
Peter Kogge (Notre Dame)
Michael Merrill (DoD)
Jose Moreira (IBM)
P. Sadyappan (Ohio State)
Mateo Valero (Universitat Politecnica de Catalunya)
Additional Information
E-mail Contact
For more information on MTAAP or if you have any questions please contact the workshop chairs (e-mail addresses listed above).
This website is hosted by the ORNL Future Technologies Group.
Other CFPs
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- 16th IEEE Workshop on Dependable Parallel, Distributed and Network-Centric Systems
- The 12th IEEE International Workshop on Parallel and Distributed Scientific and Engineering Computing PDSEC-11
- The eighth HPGC workshop High-Performance Grid and Cloud Computing Workshop
- The Seventh Workshop on High-Performance, Power-Aware Computing
Last modified: 2010-10-07 11:32:04