BMAS 2010 - 2010 IEEE International Behavioral Modeling and Simulation Conference
Date2010-09-23
Deadline2010-07-16
VenueCalifornia, USA - United States
Keywords
Websitehttps://www.bmas-conf.org
Topics/Call fo Papers
Rationale and Scope
The aim of BMAS is to encourage and facilitate the growth of modern behavioral modeling and simulation by providing a forum for presenting research results and sharing experiences relating to all its aspects. Several communities intersect at BMAS: not only behavioral model and language developers, but also analog, mixed-signal and high-speed-digital circuit and system designers, developers of computer-aided design tools at all levels of design, the semiconductor device compact modeling community, and practitioners of simulation, modeling and verification in non-traditional EE areas such as MEMS, opto-electronics and biological systems. BMAS is co-located with the Custom Integrated Circuits Conference (CICC) to further facilitate participation of the circuit and system design communities. The workshop makes use of presentations, panel discussions, embedded tutorials, and poster sessions to present the latest advances and trends. It particularly emphasizes the use of simulation and modeling techniques that cover several levels of abstraction (i.e. circuit to system), address multi-disciplinary problems (mixed-signal or mixed-technology), or address emerging areas of interest (i.e. RF techniques, biological systems).
Topics of Interest
This year’s workshop will include a special session on Model-based Engineering intended to focus on design flows driven from specification through realization where behavioral models are used in the majority of the steps in the flow (i.e., executable specs, test bench modeling with stimulus and load, model refinement/replacement at various levels of design complexity and hierarchy, design partitioning for partial-chip analysis, bottom-up verification, etc.). Papers that describe such flows, demonstrate transitions between keys flow steps, or otherwise push the state-of-the-art in model-based design, engineering, and verification to manage complexity are welcome.
Contributions are invited from all areas related to behavioral modeling and simulation. Topics include, but are not limited to:
Mixed-Signal Topics
Topics focusing on contributions to the research, development and applications involving analog, digital and mixed-signal integrated circuits and systems. Representative areas include:
Behavioral model generation, optimization, or validation and qualification
Statistical behavioral modeling
Parasitic-aware techniques
Timing, power and noise modeling for deep-submicron design
Language-based analog synthesis
Analog and mixed-signal fault modeling and test emulation
Modeling methodologies and standards
Virtual prototyping and testing
System on chip modeling simulation methods
Mixed-signal and RF system simulation
Compilation techniques for simulation optimization
Distributed and parallel mixed-signal simulation
Case studies and practical experiences of behavioral modeling
Frequency domain modeling and simulation
Semiconductor Device Compact Modeling
Representative areas include:
Compact device modeling lanuages and compilers
Standard and new compact device models implemented in Verilog-A and VHDL-AMS
Compact device models for emerging technologies and topical issues (nano-devices, distributed thermal effect, leakaging issues, manufacturability, radiation effects, etc).
Mixed-Technology Topics
Topics focusing on contributions to the research, development and applications involving systems that are part or wholly non-electrical by nature. Representative areas include:
Mixed-technology modeling (electro-mechanical, thermal-electronic, etc.)
Thermal modeling
Optical modeling
Hydraulics modeling
Mechanical modeling
MEMS modeling
Biological and biochemical modeling
Mixed-level simulation (e.g., mixed finite-element/continuous-time)
Mixed-domain modeling (frequency-domain, time-domain)
Case studies in telecommunication, automotive electronics, etc.
Power electronic modeling
Full-system verification
Stress modeling
Failure effects modeling
Language and Tool Topics
Topics focusing on contributions to the research and development of hardware description languages (HDLs) and modeling and simulation tools and algorithms that enable the simulation of the previous two general tracks. Representative areas include:
VHDL-AMS, Verilog-A, Verilog A/MS
Language requirements, analysis and validation
Language design issues and language-theoretic foundations
Extensions to standard modeling languages for specialized applications (semiconductors, MEMS, RF, etc.)
GUIs for simplifying use of languages
Compilation techniques for simulation optimization
Distributed and parallel mixed-signal simulation
Frequency domain modeling and simulation
Automated model extraction and reduction
Formal description languages for electronic circuits and systems
Unified solutions for simulating mixed domains
Tools providing interoperability of models and languages
Submission and Review Procedures
The technical program committee invites original submissions in these areas. The deadline for submission is Monday, July 16, 2010. Submitting full papers is strongly encouraged, abstract-only submissions will be considered but will be at a disadvantage. Submissions must be made electronically to www.bmas-conf.org. The paper can be up to 6 pages in length. Submissions should follow and use the IEEE guidelines and templates.
Papers will be selected through an open peer-review process supervised by the Technical Program Committee. Papers selected for oral and poster presentation will be in the conference proceedings to be published by the IEEE. Authors will be notified of decisions on their papers by August 6, 2010. A camera-ready version of a full proceedings version of accepted papers will be required by August 27, 2010.
Proceedings of the workshop will be published by the IEEE. An IEEE copyright form must accompany the paper in order for it to be published. Copyright forms will be needed if the paper is accepted.
For more information on the program, contact:
Jess Chen
BMAS 2010 Program Chair
email: program-chair-AT-bmas-conf.org
For general information, contact:
Larry Nagel
BMAS 2010 General Chair
email: general-chair-AT-bmas-conf.org
Presentation Submission Information
All presentation material must be in the form of a PowerPoint or PDF presentation. A projector connected to a Windows laptop will be available for displaying the material. The presentation material should be brought to the conference and can be loaded on the laptop using a CD reader or a USB port.
Poster presenters should also bring electronic copies of their presentation materials and load them onto the conference laptop.
All papers and presentations will be added to the BMAS website after the conference.
Registration Requirements
All presentors must register for the conference by the advance registration date. Failure to do so will cause your presentation to be removed from the program and your paper to be removed from the proceedings.
Important Dates
Paper Submission Deadline
July 16, 2010
Notification of Acceptance
August 6, 2010
Final Material Submission Deadline
August 27, 2010
Presentor Registration Deadline
August 27, 2010
Conference
September 23-24, 2010
The aim of BMAS is to encourage and facilitate the growth of modern behavioral modeling and simulation by providing a forum for presenting research results and sharing experiences relating to all its aspects. Several communities intersect at BMAS: not only behavioral model and language developers, but also analog, mixed-signal and high-speed-digital circuit and system designers, developers of computer-aided design tools at all levels of design, the semiconductor device compact modeling community, and practitioners of simulation, modeling and verification in non-traditional EE areas such as MEMS, opto-electronics and biological systems. BMAS is co-located with the Custom Integrated Circuits Conference (CICC) to further facilitate participation of the circuit and system design communities. The workshop makes use of presentations, panel discussions, embedded tutorials, and poster sessions to present the latest advances and trends. It particularly emphasizes the use of simulation and modeling techniques that cover several levels of abstraction (i.e. circuit to system), address multi-disciplinary problems (mixed-signal or mixed-technology), or address emerging areas of interest (i.e. RF techniques, biological systems).
Topics of Interest
This year’s workshop will include a special session on Model-based Engineering intended to focus on design flows driven from specification through realization where behavioral models are used in the majority of the steps in the flow (i.e., executable specs, test bench modeling with stimulus and load, model refinement/replacement at various levels of design complexity and hierarchy, design partitioning for partial-chip analysis, bottom-up verification, etc.). Papers that describe such flows, demonstrate transitions between keys flow steps, or otherwise push the state-of-the-art in model-based design, engineering, and verification to manage complexity are welcome.
Contributions are invited from all areas related to behavioral modeling and simulation. Topics include, but are not limited to:
Mixed-Signal Topics
Topics focusing on contributions to the research, development and applications involving analog, digital and mixed-signal integrated circuits and systems. Representative areas include:
Behavioral model generation, optimization, or validation and qualification
Statistical behavioral modeling
Parasitic-aware techniques
Timing, power and noise modeling for deep-submicron design
Language-based analog synthesis
Analog and mixed-signal fault modeling and test emulation
Modeling methodologies and standards
Virtual prototyping and testing
System on chip modeling simulation methods
Mixed-signal and RF system simulation
Compilation techniques for simulation optimization
Distributed and parallel mixed-signal simulation
Case studies and practical experiences of behavioral modeling
Frequency domain modeling and simulation
Semiconductor Device Compact Modeling
Representative areas include:
Compact device modeling lanuages and compilers
Standard and new compact device models implemented in Verilog-A and VHDL-AMS
Compact device models for emerging technologies and topical issues (nano-devices, distributed thermal effect, leakaging issues, manufacturability, radiation effects, etc).
Mixed-Technology Topics
Topics focusing on contributions to the research, development and applications involving systems that are part or wholly non-electrical by nature. Representative areas include:
Mixed-technology modeling (electro-mechanical, thermal-electronic, etc.)
Thermal modeling
Optical modeling
Hydraulics modeling
Mechanical modeling
MEMS modeling
Biological and biochemical modeling
Mixed-level simulation (e.g., mixed finite-element/continuous-time)
Mixed-domain modeling (frequency-domain, time-domain)
Case studies in telecommunication, automotive electronics, etc.
Power electronic modeling
Full-system verification
Stress modeling
Failure effects modeling
Language and Tool Topics
Topics focusing on contributions to the research and development of hardware description languages (HDLs) and modeling and simulation tools and algorithms that enable the simulation of the previous two general tracks. Representative areas include:
VHDL-AMS, Verilog-A, Verilog A/MS
Language requirements, analysis and validation
Language design issues and language-theoretic foundations
Extensions to standard modeling languages for specialized applications (semiconductors, MEMS, RF, etc.)
GUIs for simplifying use of languages
Compilation techniques for simulation optimization
Distributed and parallel mixed-signal simulation
Frequency domain modeling and simulation
Automated model extraction and reduction
Formal description languages for electronic circuits and systems
Unified solutions for simulating mixed domains
Tools providing interoperability of models and languages
Submission and Review Procedures
The technical program committee invites original submissions in these areas. The deadline for submission is Monday, July 16, 2010. Submitting full papers is strongly encouraged, abstract-only submissions will be considered but will be at a disadvantage. Submissions must be made electronically to www.bmas-conf.org. The paper can be up to 6 pages in length. Submissions should follow and use the IEEE guidelines and templates.
Papers will be selected through an open peer-review process supervised by the Technical Program Committee. Papers selected for oral and poster presentation will be in the conference proceedings to be published by the IEEE. Authors will be notified of decisions on their papers by August 6, 2010. A camera-ready version of a full proceedings version of accepted papers will be required by August 27, 2010.
Proceedings of the workshop will be published by the IEEE. An IEEE copyright form must accompany the paper in order for it to be published. Copyright forms will be needed if the paper is accepted.
For more information on the program, contact:
Jess Chen
BMAS 2010 Program Chair
email: program-chair-AT-bmas-conf.org
For general information, contact:
Larry Nagel
BMAS 2010 General Chair
email: general-chair-AT-bmas-conf.org
Presentation Submission Information
All presentation material must be in the form of a PowerPoint or PDF presentation. A projector connected to a Windows laptop will be available for displaying the material. The presentation material should be brought to the conference and can be loaded on the laptop using a CD reader or a USB port.
Poster presenters should also bring electronic copies of their presentation materials and load them onto the conference laptop.
All papers and presentations will be added to the BMAS website after the conference.
Registration Requirements
All presentors must register for the conference by the advance registration date. Failure to do so will cause your presentation to be removed from the program and your paper to be removed from the proceedings.
Important Dates
Paper Submission Deadline
July 16, 2010
Notification of Acceptance
August 6, 2010
Final Material Submission Deadline
August 27, 2010
Presentor Registration Deadline
August 27, 2010
Conference
September 23-24, 2010
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Last modified: 2010-08-17 17:15:19