HPINI 2016 - International Workshop on High Performance Interconnection Networks and Interconnects

The International Workshop on High Performance Interconnection Networks and Interconnects
As a part of
The International Conference on High Performance Computing & Simulation
http://hpcs2016.cisedu.info or http://cisedu.us/rp/hpcs16
July 18 ? 22, 2016
Innsbruck, Austria
Submissions could be for full papers, short papers, poster papers, or posters
IMPORTANT DATES
Paper Submissions: --- March 07, 2016
Acceptance Notification: --- April 07, 2016
Camera Ready Papers and Registration Due by: --- May 01, 2016
Conference Dates: --- July 18 ? 22, 2016
PROCEEDINGs
Accepted papers will be published in the Conference proceedings. Instructions for final manuscript format and requirements will be posted on the HPCS 2016 Conference web site. It is our intent to have the proceedings formally published in hard and soft copies and be available at the time of the conference. The proceedings is projected to be included in the IEEE Digital Library and indexed in all major indexing services accordingly.
A planned special issue of the Journal Concurrency and Computation: Practice and Experience will be available for selected papers of the conference. Best papers will be invited to submit an extended version. In addition, selected high-quality papers from the workshop will be also invited for extension and publication in a special issue in the International Journal Microprocessors and Microsystems.
SCOPE AND OBJECTIVES
Computational, storage, accelerators, and sensing resources are required to be interconnected in efficient ways in most complex systems such as data-centre and cloud infrastructures, data centers, cyber physical security systems, many-core processors, HPC and reconfigurable platforms.
This workshop is concerned with the design of high performance interconnection networks and interconnects for such complex systems. It is intended to serve as a forum to bring together researchers from academia and the experts from industry to present and discuss innovative ideas and solutions in high performance interconnection networks and Interconnects.
WORKSHOP TOPICS
The HPINI Workshop topics include (but are not limited to) the following
? Multi-core on-chip Interconnects, Clusters interconnects, Systems interconnects, and Data centers Interconnects
? Hardware and software architectures and implementations for interconnection networks
? On/Off-chip interconnection network architecture (topology, routing, arbitration, ...) (Self-aware) Quality of Service
? Design, implementation, and evaluation of interconnect standards (InfiniBand, Ethernet, PCI-Express, HyperTransport)
? Performance and power management issues
? Asynchronous interconnect designs
? System modelling and simulation
? Reliability, scalability, availability, and fault tolerance
? (Self-aware) reconfigurability issues
? Memory system design and optimizations
? Flow control and congestion management
? Implementing HPIN with FPGAs
? HPIN in cyber physical systems
? HPIN in cyber security
? Application specific HPIN
? HPIN for data centers
? Reconfigurable/Programmable interconnect components
? Impact of the interconnect on application performance
WORKSHOP ORGANIZERS
Mohamed Bakhouya
International University of Rabat
Technopolis Rabat-Shore, 11100, Sala el Jadida, Morocco
Phone: +212 648 452 702
Email: mohamed.bakhouya-AT-uir.ac.ma
URL: http://mbakhouya.free.fr/
Masoud Daneshtalab
KTH Royal Institute of Technology
Phone: +46-8790-4409
Email: masdan-AT-kth.se
URL: https://people.kth.se/~masoudd/