SLIP 2015 - 2015 System Level Interconnect Prediction Workshop

17th IEEE/ACM International Workshop on System-Level Interconnect Prediction (SLIP 2015)
Date: June 6, 2015 Saturday
Location: Moscone Convention Center, San Francisco, CA, USA
Co-located with the 52nd IEEE/ACM Design Automation Conference
Co-sponsored by ACM SIGDA and the IEEE Computer Society
http://www.sliponline.org
Technical topics include but are not limited to:
1. Interconnect prediction and optimization at various IC and system design stages
2. System-level design for FPGAs, NOCs and reconfigurable systems
3. Design, analysis, and optimization of power and clock networks
4. Interconnect reliability
5. Interconnect topologies and fabrics of multi- and many-core architectures
6. Design-for-manufacturing (DFM) and yield techniques for interconnects
7. High speed chip-to-chip interconnect design
8. Design and analysis of chip-package interfaces
9. Power consumption of interconnects
10. 3D interconnect design and prediction
11. Emerging interconnect technologies
12. Applications of interconnects to social, genetic, and biological systems
13. Co-optimization of interconnect technology and chip design