ISMVL 2011 - IEEE 41st International Symposium on Multiple-Valued Logic

The Multiple-Valued Logic Technical Committee of the IEEE Computer Society will hold its 41th annual symposium on May 23-25, 2011, in Tuusula, Finland.

The symposium will be co-located with the 19th International Workshop on Post-Binary ULSI Systems and Reed-Muller 2011 Workshop.

You are invited to submit an original paper, survey or tutorial paper on any subject in the area of multiple-valued logic, including but not limited to:

* Algebra and Formal Aspects

* ATPG and SAT

* Automatic Reasoning

* Circuit/Device Implementation

* Communication Systems

* Computer Arithmetic

* Data Mining

* Fuzzy Systems and Soft Computing

* Image Processing

* Logic Design and SwitchingTheory

* Logic Programming

* Machine Learning and Robotics

* Mathematical Fuzzy Logic

* Nano Technology

* Philosophical Aspects

* Quantum Computing

* Signal Processing

* Spectral Techniques

* Verification

A selection of the papers presented at the ISMVL 2010 will be invited to provide an extended version to be published in a special issue of the Journal of Multiple-Valued Logic and Soft Computing.
Important dates:
Post-Binary ULSI Systems Workshop May 22, 2011
ISMVL 2011 Symposium May 23-25, 2011
Reed Muller 2011 Workshop May 26, 2011

* ISMVL.ORG

* History of ISMVL

* IEEE Computer Society

* IEEE CS Technical Committee on Multiple-Valued Logic