RASDAT 2012 - 3rd IEEE International Workshop on Reliability Aware System Design and Test (RASDAT12)

Even as advances in CMOS technology come up against physical limits of material properties and lithography, raising many new challenges that must be overcome to ensure IC quality and reliability, there appears to be no obvious alternate technology that can replace End-of-Roadmap CMOS over the next decade. However, many reliability challenges from increasing defect rates, manufacturing variations, soft errors, wearout, etc. will need to be addressed by innovative new design and test methodologies if device scaling is to continue on track as per Moore`s Law to 10nm and beyond. The key objective of this annual workshop, planned to be held in conjunction with the International Conference on VLSI Design, is to provide an informal forum for vigorous creative discussion and debate of this area. The aim is to encourage the presentation and discussion of truly innovative and `out-of-the-box` ideas that may not yet have been fully developed for presentation at reviewed conferences to address these challenges. Additionally, the workshop invites embedded talks and tutorials on cutting edge topics related to reliability aware design of CMOS and hybrid nanotechnology systems.

http://www.serc.iisc.ernet.in/~viren/RASDAT12/
Representative topics include, but are not limited to:

-Design for test,
- Built-in self-test
- ATPG and defect oriented test
- Delay test
- Low power test
- Instruction-based self-test
- On-line test methodology
- Reliability of CMOS circuits
- Self checker circuits
- Self diagnosis methods
- Fault tolerant micro-architecture
- Self-healing system design
- Energy and performance aware fault tolerant micro-architectures
- Device degradation and mitigation
- System validation methodology
- Secure system design
- Design for reliability, dependability, and verifiability
Submissions

Authors are invited to submit previously unpublished technical proposals. The proposals must be full papers not to exceed 6 pages. Each submission should include: title, full name and affiliation of all authors, a short abstract of 50 words, and 4 to 6 keywords. Also, identify a contact author and include a complete correspondence address, phone number, fax number, and e-mail address. Submit a copy of your proposal in PDF either online submission or via e-mail to : rasdat2012-AT-serc.iisc.ernet.in

Key Dates:
Paper Submission: September 26, 2011
Acceptance Notification: October 31, 2011
Final Paper Due: December 1, 2011
Presentation Due: Jan 1, 2012

General Information

Adit Singh
Auburn University, Auburn, USA
E-mail: adsingh-AT-auburn.edu
Tel: +1.334.644.1647
Fax: +1.334.844.1809

Virendra Singh
Indian Institute of Science, Bangalore, India
E-mail: viren-AT-serc.iisc.ernet.in
Virendra-AT-computer.org
Tel: +91.80.2293.3421
Fax: +91.80.2360.2648

Program Related Information

Erik Larsson
Linkoping University, Sweden
E-mail: erila-AT-ida.liu.edu
Tel: +46.13.28.6619
Fax: +46.13.28.4499

Rubin Parekhji
Texas Instruments, Bangalore, India
E-mail: parekhji-AT-ti.com