ATS 2010 - IEEE 19th Asian Test Symposium ATS 2010
Topics/Call fo Papers
ATS 2010 is the nineteenth in this series of symposia started in 1992 that are devoted to testing and fault tolerant computing. ATS is now recognized as the main regular event of the word that is covering the many dimensions of Testing for computing systems. The symposium will be organized by the Shanghai University, Shanghai, the most modernized city of China. Shanghai is a vibrant blend of traditional culture and cosmopolitan life and it is the economic, educational and recreational center of the country, offering a variety of significant cultural sights. The famous 2010 World Expo will be held in Shanghai where a number of brilliant buildings and exhibition halls in different styles will be shown to the world.
The symposium will be organized by the Shanghai University, Shanghai, the most modernized city of China. Shanghai is a vibrant blend of traditional culture and cosmopolitan life and it is the economic, educational and recreational center of the country, offering a variety of significant cultural sights. The famous 2010 World Expo will be held in Shanghai where a number of brilliant buildings and exhibition halls in different styles will be shown to the world. The Oriental Pearl tower is currently one of the highest buildings in the world located in down town area of Shanghai, surrounded by tremendous department stores and recreational facilities.
Topics of interest include (but not limited to):
Original contributions on VLSI testing are solicited. Topics of interest include, but are not limited to, the following categories:
1. Test generation & fault simulation 2. DfX: Design for testability, reliability, dependability…
3. Fault diagnosis 4. Analog & mixed-signal testing / RF/ High speed I/O testing
5. Memory testing and FPGA testing 6. Wafer-level testing
7. Delay fault testing / Low power testing 8. Board and system testing / On-line testing
9. System-on-a-chip- test/ System-in-package test 10. Network-on-a-chip testing
11. Software testing / verification 12. CPU testing
13. Failure analysis / fault modeling 14. Built-in self-test / Embedded testing
15. Fault tolerance / error correction 16. Functional testing
17. IDDQ testing 18. Test economics
19. Test standard: IEEE 1500, boundary scan 20. Test experience in industry
21. Automatic test equipment 22. Yield Enhancement / Silicon debug
The symposium will be organized by the Shanghai University, Shanghai, the most modernized city of China. Shanghai is a vibrant blend of traditional culture and cosmopolitan life and it is the economic, educational and recreational center of the country, offering a variety of significant cultural sights. The famous 2010 World Expo will be held in Shanghai where a number of brilliant buildings and exhibition halls in different styles will be shown to the world. The Oriental Pearl tower is currently one of the highest buildings in the world located in down town area of Shanghai, surrounded by tremendous department stores and recreational facilities.
Topics of interest include (but not limited to):
Original contributions on VLSI testing are solicited. Topics of interest include, but are not limited to, the following categories:
1. Test generation & fault simulation 2. DfX: Design for testability, reliability, dependability…
3. Fault diagnosis 4. Analog & mixed-signal testing / RF/ High speed I/O testing
5. Memory testing and FPGA testing 6. Wafer-level testing
7. Delay fault testing / Low power testing 8. Board and system testing / On-line testing
9. System-on-a-chip- test/ System-in-package test 10. Network-on-a-chip testing
11. Software testing / verification 12. CPU testing
13. Failure analysis / fault modeling 14. Built-in self-test / Embedded testing
15. Fault tolerance / error correction 16. Functional testing
17. IDDQ testing 18. Test economics
19. Test standard: IEEE 1500, boundary scan 20. Test experience in industry
21. Automatic test equipment 22. Yield Enhancement / Silicon debug
Other CFPs
Last modified: 2010-10-26 14:51:42