apdcm 2011 - 13th Workshop on Advances in Parallel and Distributed Computational Models

The past twenty years have seen a flurry of activity in the arena of parallel and distributed computing. In recent years, novel parallel and distributed computational models have been proposed in the literature, reflecting advances in new computational devices and environments such as optical interconnects, programmable logic arrays, networks of workstations, radio communications, mobile computing, DNA computing, quantum computing, sensor networks etc. It is very encouraging to note that the advent of these new models has lead to significant advances in the resolution of various difficult problems of practical interest.

The main goal of this workshop is to provide a timely forum for the exchange and dissemination of new ideas, techniques and research in the field of the parallel and distributed computational models. The workshop is meant to bring together researchers and practitioners interested in all aspects of parallel and distributed computing taken in an inclusive, rather than exclusive, sense. We are convinced that the workshop atmosphere will be conducive to open and mutually beneficial exchanges of ideas between the participants.

Topics

Topics of interest include, but are not limited to

Models of Parallel and Distributed Computing

BSP and LogP models, Radio communication models, Mobile computing models, Sensor network models, Hardware-specific models, FPGA models, Systolic arrays and cellular automata, Biologically-based computing models, Quantum models, Reconfigurable models, Optical models, CUDA

Algorithms and Applications

Geometric and graph algorithms, Combinatorial algorithms, Randomized and approximation techniques, Numerical algorithms, Network algorithms, Localized algorithms, Distributed algorithms, Image processing, High-performance computing, Image processing

Practical Aspects

Architectural and implementation issues, Performance analysis and simulation, PVM/MPI, Multi-core processors, Programmable logic arrays, GPGPU, Design of network protocols, Development tools, Fault tolerance

Submission Guidelines

Prospective authors are encouraged to submit an electronic version of original, unpublished manuscripts, not to exceed 8 pages based on IEEE Computer Society Proceedings Manuscript Formatting Guidelines (DOC,PDF). We also welcome comprehensive survey papers on timely topics. Submissions should be in PDF. Submissions must be received by December 10, 2010. Papers should be submitted through EasyChair. If an author does not have EasyChair account, it must be created. All manuscripts will be reviewed. The complete symposium and workshop proceedings will be published by IEEE CS Press as a CD-ROM disk.

Important Dates

Submission Due : December 10, 2010
Review Decision Mailed: January 10, 2011
Final Manuscript Due: February 1, 2011
Workshop Date: May 16, 2011