MAMHYP 2017 - Fourth Workshop on Models, Algorithms and Methodologies for Hybrid Parallelism in new HPC Systems
Topics/Call fo Papers
More precisely, from an architectural point of view, a High Performance Computing system can
be described by means of a hybrid multi-level structure: at the highest level there are
several systems connected among them by geographic networks (System level); an intermediate
level is composed by the nodes in a single system communicating among them by means of dedicated
fast networks or high performance switches (Node level); at the lowest level, finally, there are several
computing elements, computing cores as well as graphic accelerators, sharing resources in a single
CPU (Core level).
These architecture levels have very different features and they require different algorithmic
development methodologies. For such a reason, the development of algorithms and scientific
software for these system implies a suitable combination of several methodologies to deal with the
different kinds of parallelism corresponding to each architectural level. The general aim is then the
development of hybrid and hierarchical algorithms, able to be aware of the underlying platform.
Main problems in this field are the management of large parallelism degree due to several
computing units, the heterogeneity of these devices and the combination of the several kinds of
parallelism in a single algorithm. These topics are mainly investigated also to gain the so called
exascale performance, and, from another side, the high performance cloud computing, with regard
to the so called Internet of Things and its interaction with HPC.
This workshop focuses specifically on Models, Methodologies, Algorithms and Environments to
exploit all forms of parallelism and their combination at the all levels in the emerging HPC
multicomputers, with the goal of gathering the current state of knowledge in the field.
be described by means of a hybrid multi-level structure: at the highest level there are
several systems connected among them by geographic networks (System level); an intermediate
level is composed by the nodes in a single system communicating among them by means of dedicated
fast networks or high performance switches (Node level); at the lowest level, finally, there are several
computing elements, computing cores as well as graphic accelerators, sharing resources in a single
CPU (Core level).
These architecture levels have very different features and they require different algorithmic
development methodologies. For such a reason, the development of algorithms and scientific
software for these system implies a suitable combination of several methodologies to deal with the
different kinds of parallelism corresponding to each architectural level. The general aim is then the
development of hybrid and hierarchical algorithms, able to be aware of the underlying platform.
Main problems in this field are the management of large parallelism degree due to several
computing units, the heterogeneity of these devices and the combination of the several kinds of
parallelism in a single algorithm. These topics are mainly investigated also to gain the so called
exascale performance, and, from another side, the high performance cloud computing, with regard
to the so called Internet of Things and its interaction with HPC.
This workshop focuses specifically on Models, Methodologies, Algorithms and Environments to
exploit all forms of parallelism and their combination at the all levels in the emerging HPC
multicomputers, with the goal of gathering the current state of knowledge in the field.
Other CFPs
- Workshop on Scheduling for Parallel Computing (SPC)
- 7TH WORKSHOP ON LANGUAGE BASED PARALLEL PROGRAMMING
- PGAS AAP - Workshop on PGAS programming model and its application to HPC
- Workshop on Performance Evaluation of Parallel Applications on Large-Scale Systems
- Minisymposium on HPC Applications in Physical Sciences
Last modified: 2017-05-05 07:05:42