MEDIS 2017 - 2nd IEEE International COMPSAC Workshop on Mobile and Embedded Devices Integrated Supercomputing

Mobile and Embedded platforms are used everywhere today. Researchers and system designers provide platforms with more features for parallelization such as multicore architecture, integrated pipelining, independent distributed and shared cache, per clock cycle execution and on the other hand, they work on software architecture to support aforementioned hardware, compilers and code generators, mobile operating systems with ability of serving concurrent processes and threads. GPGPU is currently the dominant platform for supercomputing. The challenge is becoming more exciting when GPGPU chips with high number of simple cores are embedded in SoC, facilitating developers to increase computational speed on mobile platforms extensively. And furthermore, Stratix 10 now is released with an ARM processor allowing the entire architecture to follow big.LITTLE topology.
MEDIS Workshop is aiming to collect and choose high quality papers in the filed of mobile supercomputing and provide a platform for researchers and scientists to discuss about future generation of ultra dense multicore mobile and embedded platforms used in computationally heavy applications. Such platforms will be used in Cognitive and Semantic Robotics, ubiquities Computing, and they help improving the quality of life in general. Papers are encouraged to present innovative ideas in software or hardware design and development for parallel computing used in mobile platforms.
Scope of the workshop:
Researchers and practitioners all over the world, from both academia and industry, working in the areas of Parallel Computing, Distributed Multicore Computing, Cloud, HPC and Supercomputing are invited to discuss state of the art solutions, novel issues, recent developments, applications, methodologies, techniques, experience reports, and tools for the development and use of secure service oriented systems. Topics of interest include, but are not limited to, the following:
Parallel Computation for Embedded systems
Design and Development of Parallel and Multicore Embedded platforms
Mobile Supercomputing
GPGPU SoC
Hardware Realization of Parallel Algorithms for Mobile Devices
Distributed mobile cloud
Embedded Supercomputing
Tegra Jetson TX1 GPGPU programming
CUDA BLAST and MAGMA on mobile
Massive Parallelization Schemes
Parallel Algorithms
Mobile Supercomputing Applications
Network Bottlenecks in Massive Parallelization
Clouds and Distributed Computing
Data Analytics
Visualization and Storage
Performance and System Software for Parallel machine
FPGA Development for Massive Parallelization
Program Committee (to be confirmed):
Farokh Koroupi, Baft Azad University, Iran
Bala Subramanian, European University of Lefke, Cyprus
Birim Balci Demirci, Okan University, Turkey
Chandra Cheij, NVidia, USA
Alexander Chefranov, Eastern Mediterranean University, Cyprus
Maxim Anikeev, Southern Federal University, Russia
Manuel Carcenac, Cyprus Science University, Cyprus