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TRANSACT 2017 - 12th ACM SIGPLAN Workshop on Transactional Computing / 9th Workshop on the Theory of Transactional Memory



VenueAustin, TX, Botswana Botswana



Topics/Call fo Papers

The past decade has seen an explosion of interest in programming languages, systems, and hardware to support transactions, speculation, and related alternatives to classical lock-based concurrency. Recently, transactional memory has crossed two important thresholds. First, IBM and Intel are now shipping processors with hardware support for transactional memory (TM). Second, the C++ Standard Committee has been working intensively to integrate TM as a new language feature. On the other hand, the post-release discovery of an erratum in Intel’s hardware TM implementation has brought upfront the need for effective TM verification mechanisms. Overall, these developments highlight the demand for continued high quality transactional memory research.
In 2017, Transact will be merged with the Workshop on the Theory of Transactional Memory (WTTM); this will mark the twelfth Transact and ninth WTTM. Transact 2017, will provide a forum to present and discuss the latest research on all aspects of transactional computing. The scope of the workshop is intentionally broad, with the goal of encouraging interaction across the languages, architecture, systems, database, and theory communities. Papers may address implementation techniques, foundational results, applications and workloads, or experience with working systems. Environments of interest include the full range from multithreaded or multicore processors to high-end parallel and distributed computing platforms.
The workshop seeks papers on topics related to all areas of software, hardware, and formal foundations for transactional computing. Specific topics of interest include but are not limited to:
Run-time systems
Hardware support
Applications, workloads, and test suites
Experience reports
Language mechanisms and semantics
Formal semantics
Memory models
Transactions for non-uniform and non-cache coherent memory systems (e.g., NUMA, GPUs, RDMA, distributed transactions)
Formal verification
Speculative concurrency
Conflict detection and contention management
Debugging and tools
Static analysis and compiler optimizations
Checkpointing and failure atomicity
Persistence and I/O
Machine Learning and Transactional Memory
Nesting and exceptions
Impossibility results and lower bounds
Concurrent data structures and algorithms
Papers should present original research. The final version of the accepted papers will appear on the workshop's web site. These papers will be available to the participants in electronic format during the workshop. Transact/WTTM does not publish proceedings, so accepted papers may appear in other venues as well. As transactional memory spans many disciplines, papers should provide sufficient background material to make them accessible to the broader community. Papers focused on foundations should indicate how the work can be used to advance practice; papers on experiences and applications should indicate how the experiments reinforce or reflect principles.

Last modified: 2016-12-06 10:37:10