RAW 2017 - 4th Reconfigurable Architectures Workshop
Date2017-05-29
Deadline2017-01-13
VenueFlorida, USA - United States
Keywords
Websitehttps://raw.necst.it
Topics/Call fo Papers
The 24th Reconfigurable Architectures Workshop (RAW 2017) will be held in Orlando, Florida USA in May 2017. RAW 2017 is associated with the 31st Annual IEEE International Parallel & Distributed Processing Symposium (IEEE IPDPS 2017) and is sponsored by the IEEE Computer Society and the Technical Committee on Parallel Processing. The workshop is one of the major meetings for researchers to present ideas, results, and on-going research on both theoretical and practical advances in Reconfigurable Computing.
A reconfigurable computing environment is characterized by the ability of underlying hardware architectures or devices to rapidly alter (often on the fly) the functionalities of their components and the interconnection between them to suit the problem at hand. The area has a rich theoretical tradition and wide practical applicability. There are several commercially available reconfigurable platforms (FPGAs and coarse-grained devices) and many modern applications (including embedded systems and HPC) use reconfigurable subsystems. An appropriate mix of theoretical foundations and practical considerations, including algorithms architectures, applications, technologies and tools, is essential to fully exploit the possibilities offered by reconfigurable computing. The Reconfigurable Architectures Workshop aims to provide a forum for creative and productive interaction for researchers and practitioners in the area.
Topics of interest
NOTE: the three main topics of interest will be updated shortly, stay tuned!
Architectures & Algorithms
Theoretical Interconnect and Computation Models
Algorithmic Techniques and Mapping
Run-Time Reconfiguration Models and Architectures
Emerging Technologies (optical models, 3D Interconnects, devices)
Bounds and Complexity Issues
Analog Arrays
Reconfigurable Systems & Applications
Reconfigurable accelerators (HPC, Bioinformatics, Acceleration Applications in Finance, Data Mining, Big Data and Analytics)
Embedded systems and Domain-Specific solutions (Digital Media, Gaming, Automotive applications)
FPGA-based MPSoC and Multicore
Distributed Systems & Networks
Wireless and Mobile Systems
Emerging applications (Organic Computing, Biology-Inspired Solutions)
Critical issues (Security, Energy efficiency, Fault-Tolerance)
Software & Tools
Operating Systems and High-Level Synthesis
High-Level Design Methods (Hardware/Software co-design, Compilers)
System Support (Soft processor programming)
Runtime Support
Reconfiguration Techniques (reusable artifacts)
Simulations and Prototyping (performance analysis, verification tools)
A reconfigurable computing environment is characterized by the ability of underlying hardware architectures or devices to rapidly alter (often on the fly) the functionalities of their components and the interconnection between them to suit the problem at hand. The area has a rich theoretical tradition and wide practical applicability. There are several commercially available reconfigurable platforms (FPGAs and coarse-grained devices) and many modern applications (including embedded systems and HPC) use reconfigurable subsystems. An appropriate mix of theoretical foundations and practical considerations, including algorithms architectures, applications, technologies and tools, is essential to fully exploit the possibilities offered by reconfigurable computing. The Reconfigurable Architectures Workshop aims to provide a forum for creative and productive interaction for researchers and practitioners in the area.
Topics of interest
NOTE: the three main topics of interest will be updated shortly, stay tuned!
Architectures & Algorithms
Theoretical Interconnect and Computation Models
Algorithmic Techniques and Mapping
Run-Time Reconfiguration Models and Architectures
Emerging Technologies (optical models, 3D Interconnects, devices)
Bounds and Complexity Issues
Analog Arrays
Reconfigurable Systems & Applications
Reconfigurable accelerators (HPC, Bioinformatics, Acceleration Applications in Finance, Data Mining, Big Data and Analytics)
Embedded systems and Domain-Specific solutions (Digital Media, Gaming, Automotive applications)
FPGA-based MPSoC and Multicore
Distributed Systems & Networks
Wireless and Mobile Systems
Emerging applications (Organic Computing, Biology-Inspired Solutions)
Critical issues (Security, Energy efficiency, Fault-Tolerance)
Software & Tools
Operating Systems and High-Level Synthesis
High-Level Design Methods (Hardware/Software co-design, Compilers)
System Support (Soft processor programming)
Runtime Support
Reconfiguration Techniques (reusable artifacts)
Simulations and Prototyping (performance analysis, verification tools)
Other CFPs
- 26th International Heterogeneity in Computing Workshop
- IEEE International Workshop on Evolvable Methods for Benchmarking Realism and Community Engagement
- Emerging Parallel and Distributed Runtime Systems and Middleware
- IEEE Workshop on Dependable Parallel, Distributed and Network-Centric Systems
- Workshops on Job Scheduling Strategies for Parallel Processing
Last modified: 2016-11-16 11:56:51