LP-EMS 2016 - 2nd Workshop on design of Low Power EMbedded Systems

Modern cyber-physical and highly networked systems may impose challenging and conflicting requirements. Implementing real-time high-performance systems and minimizing, contemporarily, their power consumption is not straightforward. It implies to devise advanced modelling strategies as well as efficient design automation techniques that have the capacity to optimize complex parallel applications over heterogeneous many-cores platforms. Complexity on algorithmic side and heterogeneity on hardware side are colliding system constraints, which can be tackled by adopting hw/sw co-design solutions and flexible design frameworks.
With respect to this context, we expect contributions in different fields of digital signal processing such as: telecommunication, multimedia, medical imaging, computing graphics, biomedical applications… and many others! Papers may include, but are not limited to, the following topics:
High-level synthesis and hw/sw co-design techniques for low-power digital signal/image processing;
Design of self-energy aware systems;
Design space exploration techniques, with special emphasis on power/energy estimations and power minimization methodologies;
Parallel/high throughput processing techniques for low-power digital signal/image processing;
Algorithm-level optimization, low-complexity algorithm for low-power digital signal/image processing;
MPEG Green Metadata;
Dynamic voltage and frequency scaling, hw and sw dynamic power management.
Workshop Organizers:
Francesca Palumbo, Università degli Studi di Sassari, PolComIng, email:fpalumbo-AT-uniss.it
Maxime Pelcat, INSA de Rennes, IETR, email:maxime.pelcat-AT-insa-rennes.fr
Daniel Menard, INSA de Rennes, IETR, email:daniel.menard-AT-insa-rennes.fr