FPGA 2017 - 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays

ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA 2017) is the premier conference for presentation of advances in FPGA technology. Accepted papers will be published in the conference proceedings and available in the ACM Digital Library.
As usual, we solicit research papers related to the following areas:
FPGA Architecture: Architectures for programmable logic fabrics or their components, including routing, flexible logic cells, embedded blocks (memory, DSP, processors), and I/O interfaces. Novel commercial architectures and architectural features.
FPGA Circuit Design: Circuits and layout techniques for design of FPGAs. Impact of future process and design technologies on FPGAs. Methods for analyzing and improving static and dynamic power, power and clock distribution, yield, manufacturability, security, reliability, and testability. Use of novel memory or nano-scale devices in FPGAs.
CAD for FPGAs: Algorithms for synthesis, technology mapping, logic and timing optimization, clustering, placement, and routing of FPGAs. Novel design software for system-level partitioning, debug, and verification. Algorithms for modeling, analysis and optimization of timing and power.
High-Level Abstractions and Tools for FPGAs: General-purpose and domain-specific languages, tools, and techniques to facilitate the design, debugging and verification of FPGA-based applications and systems. Examples include hardware/software co-design, high-level synthesis, digital signal processing, compute acceleration, networking, and embedded systems.
FPGA-based and FPGA-like Computing Engines: Systems and software for compiled accelerators, reconfigurable computing, adaptive computing, and rapid-prototyping.
Applications and Design Studies: Implementation of novel designs on FPGAs to achieve high-performance, low-power, security or high-reliability, making use of the unique flexibility provided by FPGA architectures. Application-domain studies to analyze or improve FPGA architectures.