CBP 2016 - 5th JILP Workshop on Computer Architecture Competitions (JWAC-5): Championship Branch Prediction (CBP-5)
Date2016-06-18 - 2016-06-22
Deadline2015-11-18
VenueSeoul, South Korea
Keywords
Websitehttps://www.jilp.org/cbp2016
Topics/Call fo Papers
The workshop on computer architecture competitions is a forum for holding competitions to evaluate computer architecture research topics. The fifth JWAC workshop is organized around a competition for branch prediction algorithms. The Championship Branch Prediction (CBP) invites contestants to submit their branch prediction code to participate in this competition. Contestants will be given a fixed storage budget to implement their best predictors on a common evaluation framework provided by the organizing committee.
Objective
The goal for this competition is to compare different branch prediction algorithms in a common framework. Predictors will be evaluated for conditional branches. Predictors must be implemented within a fixed storage budget as specified in the competition rules. The simple and transparent evaluation process enables dissemination of results and techniques to the larger computer architecture community and allows independent verification of results.
Prizes
The championship will have three tracks, each designing conditional branch predictior with different storage budgets: 8KB, 64KB, and unlimited size. In each category an additional budget of 2048 bits is allowed (for tracking global history for example). The top performer for each track will receive a trophy commemorating his/her triumph (OR some other prize to be determined later). Top submissions will be invited to present at the workshop, when results will be announced. All source code, write-ups and performance results will be made publicly available through the JWAC-5 website.
Submission Requirements
Each submission should include an abstract, write up, and predictor code. We should be able to simulate your predictor with a reasonable amount of memory (not exceeding 16GB), and within sixty hours of simulation time. Also, your predictors must not violate causality (cannot use future information to predict the current branch). Furthermore, you are not allowed to spawn another thread from your predictor code. Finally, predictors are not allowed to "profile" traces in order to adjust their algorithms for a particular trace or group of traces.
Objective
The goal for this competition is to compare different branch prediction algorithms in a common framework. Predictors will be evaluated for conditional branches. Predictors must be implemented within a fixed storage budget as specified in the competition rules. The simple and transparent evaluation process enables dissemination of results and techniques to the larger computer architecture community and allows independent verification of results.
Prizes
The championship will have three tracks, each designing conditional branch predictior with different storage budgets: 8KB, 64KB, and unlimited size. In each category an additional budget of 2048 bits is allowed (for tracking global history for example). The top performer for each track will receive a trophy commemorating his/her triumph (OR some other prize to be determined later). Top submissions will be invited to present at the workshop, when results will be announced. All source code, write-ups and performance results will be made publicly available through the JWAC-5 website.
Submission Requirements
Each submission should include an abstract, write up, and predictor code. We should be able to simulate your predictor with a reasonable amount of memory (not exceeding 16GB), and within sixty hours of simulation time. Also, your predictors must not violate causality (cannot use future information to predict the current branch). Furthermore, you are not allowed to spawn another thread from your predictor code. Finally, predictors are not allowed to "profile" traces in order to adjust their algorithms for a particular trace or group of traces.
Other CFPs
- Fourth ACM International Workshop on Many-core Embedded Systems (MES)
- International Symposium on Agents, Multi-Agent Systems and Robotics 2016 (ISAMSR 2016)
- 17th International Conference on Intelligent Data Engineering and Automated Learning
- 4th IEEE International Conference on Cloud Computing and Intelligence Systems
- 2016 International Workshop on Digital Watermarking
Last modified: 2016-02-28 00:07:34