P2S2 2016 - International Workshop on Parallel Programming Models and Systems Software for High-End Computing (P2S2)
Topics/Call fo Papers
In the past decade, high-end computing (HEC) architectures have become an important tool in all aspects of scientific discovery. Having ushered in an era where HEC-enabled simulation is considered a third pillar of science along with theory and experiment, HEC architectures have quickly become a credible direction of focussed and long-term research. Rapid advances are taking place in different aspects of HEC architectures in an effort to improve performance. Recently, multi- and many-core systems (Intel, AMD), alternative architectures and accelerators (GPGPUs, Cell), high-speed network architectures (InfiniBand, Myrinet, iWARP), and integrated computing platforms (Blue Gene, Cray) have been introduced along this effort.
These advances in the fundamental architecture of HEC architectures mean little, however, without appropriate software components that enable high-performance applications to take advantage of these architectures. System software plays a crucial role in exposing the raw performance of the underlying hardware in an efficient manner. Equally important are innovative, high-performance Parallel Programming models that enable scientists to express parallel algorithms so that they can execute efficiently on HEC architectures.
The goal of this workshop is to bring together researchers and practitioners in parallel programming models and systems software for high-end computing architectures. Please join us in a discussion of new ideas, experiences, and the latest trends in these areas at the workshop.
The published papers will be available at the conference in CD format, and will be submitted to the IEEE CS Digital Library
These advances in the fundamental architecture of HEC architectures mean little, however, without appropriate software components that enable high-performance applications to take advantage of these architectures. System software plays a crucial role in exposing the raw performance of the underlying hardware in an efficient manner. Equally important are innovative, high-performance Parallel Programming models that enable scientists to express parallel algorithms so that they can execute efficiently on HEC architectures.
The goal of this workshop is to bring together researchers and practitioners in parallel programming models and systems software for high-end computing architectures. Please join us in a discussion of new ideas, experiences, and the latest trends in these areas at the workshop.
The published papers will be available at the conference in CD format, and will be submitted to the IEEE CS Digital Library
Other CFPs
- International Workshop on Power-aware Algorithms, Systems, and Architectures (PASA)
- International Workshop on Sustainable HPC Cloud (SHPCloud)
- International Workshop on Scheduling and Resource Management for Parallel and Distributed Systems (SRMPDS)
- International Workshop on HW/SW Interface for IoT and Big Data (InterIoT&BigData)
- 45th International Conference on Parallel Processing (ICPP-2016)
Last modified: 2016-01-17 18:29:44