ResearchBib Share Your Research, Maximize Your Social Impacts
Sign for Notice Everyday Sign up >> Login

HOST 2016 - 2016 IEEE International Symposium on Hardware Oriented Security and Trust

Date2016-05-03 - 2016-05-05


VenueWashington DC Metro Area, USA - United States USA - United States



Topics/Call fo Papers

The focus of modern computational and communication systems has been shifting from effective sharing of well-protected, scarce, and expensive resources to large-scale information exchange among a plurality of users that communicate using protected mobile devices and sensors, which can be placed in potentially hostile environments. Additionally, integrated circuit synthesis and manufacturing techniques are now complex and distributed with a number of potential security vulnerabilities. Security has emerged as a metric of paramount importance. The scope of system security now includes, in addition to encrypted communication, properties such as privacy, anonymity, and trust. The starting and ending points for all system and application vulnerabilities and defense mechanisms are hardware. The initial impetus was provided by government agencies and individual efforts, but recently a number of coordinated research projects have been undertaken by essentially all hardware and system companies.
The IEEE International Symposium on Hardware Oriented Security and Trust (HOST) aims to facilitate the rapid growth of hardware-based security research and development. HOST seeks original contributions in the area of hardware and system security. Relevant research topics include techniques, tools, design/test methods, architectures, circuits, and applications of secure hardware. HOST 2015 invites contributions that are related to, but not limited by, the following topics.
Hardware Trojan attacks and detection techniques
Hardware-based security primitives (PUFs, PPUFs, HRNG)
Security, privacy, and trust protocols using hardware security primitives
Trusted information flow
Trusted design using untrusted tools
Trusted manufacturing including split manufacturing
Remote integrated circuits enabling and disabling and IP watermarking
Undeniable hardware metering techniques
Techniques and metrics for hardware system data confidentiality and hardware design confidentiality, integrity, and authenticity
Reverse engineering and hardware obfuscation
Side-channel attacks and techniques for their prevention
Supply chain risks mitigation including counterfeit detection & avoidance
Hardware tampering attacks
Hardware authentication techniques
Hardware techniques that ensure software and/or system security
Trusted remote sensing and computing
Hardware attestation techniques
To present at the symposium, submit an Acrobat (PDF) version of your paper on the symposium submission website. The page limit is 6 pages, double column, IEEE format, with a minimum font size of 10 points. Submissions must be anonymous and must not identify the authors, directly orindirectly, anywhere in the manuscript.

Last modified: 2015-09-09 22:59:38