WPSS 2015 - International Workshop on Parallel/Portfolio Satisfiability Solving (WPSS 2015)

During the last decade, the fundamental Satisfiability Problem (SAT) has been extensively studied. This interest of the community significantly grows because of its conceptual simplicity and its ability to describe a wide set of various problems, including hardware verification, planning, automated reasoning, and others. Consequently, there is an increasing demand for high performance SAT-solving algorithms in industry. To date, the parallel SAT solving remains a challenging problem. In spite of the actual trend in processor development, which is moving from single-core to multi-core CPU, there still exist few parallel solving works dedicated to the SAT problem. This workshop will focus on SAT and beyond SAT solving techniques exploiting parallelism or portfolio approaches within multi-threaded, distributed and grid architectures but also emerging massively parallel architectures such as Global Processing Units (GPUs) and Field-Programmable Gate Arrays (FPGAs).
We invite papers in this emerging discipline which includes, but not limited to, the following areas of interest.
The WPSS Workshop topics include (but are not limited to) the following:
Parallel Solving Techniques within Shared and Distributed Memory for SAT, Max-SAT #SAT, QBF, etc.
General-Purpose Computation on GPUs (GPGPU) for SAT*
Reconfigurable Computing and FPGA for SAT*
Parallel SAT* Pre-processing
Portfolios and/or Hybridized algorithms within a Parallel Context