DPNoC 2015 - The 2nd International Workshop on the Design and Performance of Networks on Chip

The 2nd International Workshop on the Design and Performance of Networks on Chip (DPNoC 2015) to be held in conjunction with the 10th International Conference on Future Networks and Communications (FNC 2015)
http://cs-conferences.acadiau.ca/fnc-15/
Important Dates:
Submission Deadline: March 27, 2015
Authors Notification: May 16, 2015
Final Manuscript Due: June 16, 2015
Scope
The advance in silicon technology has led to the emergence of on-Chip Systems (SoC), where a complete system with a large number of intellectual property cores can be integrated onto a single silicon chip. The performance of SoCs highly depends on the speed and efficiency of their underlying communications subsystems. The light weight networks, known as Network-on-Chip (NoC), have been introduced to overcome the scalability problem found in shared-bus communication architectures. Intensive research studies have been undertaken investigating the design cost, in terms of silicon area and power consumption, and performance of NoC. Most of these studies are targeting NoC topology, router microarchitecture, switching techniques, routing algorithms, and application mapping onto NoC.
The workshop on the Design and Performance of Networks on Chip (DPNoC'2015) will represent an international forum for researchers from both academia and industry to expose the latest trends, research findings, and emerging issues in this area. The Workshop topics include (but are not limited to) the following:
? Router microarchitecture
? Flow control techniques
? Switching techniques
? Routing protocols
? Fault tolerance/reliability in NoC
? Technology constraints on NoCs
? Scheduling and application mapping onto NoC
? Wireless NoCs
? NOCs modeling and performance evaluation
? NOC scalability
? FPGA-based implementation of reconfigurable NoCs
Journal Special Issue
Extended version of all accepted papers in the workshop will be published as special issue on The International Journal of Computing and Digital Systems (IJCDS)