RAW 2015 - 22nd Reconfigurable Architectures Workshop
Topics/Call fo Papers
The 22nd Reconfigurable Architectures Workshop (RAW 2015) will be held in Hyderabad, India in May 2015. RAW 2015 is associated with the 29th Annual International Parallel & Distributed Processing Symposium (IPDPS 2015) and is sponsored by the IEEE Computer Society Technical Committee on Parallel Processing. The workshop is one of the major meetings for researchers to present ideas, results, and on-going research on both theoretical and practical advances in Reconfigurable Computing.
A reconfigurable computing environment is characterized by the ability of underlying hardware architectures or devices to rapidly alter (often on the fly) the functionalities of their components and the interconnection between them to suit the problem at hand. The area has a rich theoretical tradition and wide practical applicability. There are several commercially available reconfigurable platforms (FPGAs and coarse-grained devices) and many modern applications (including embedded systems and HPC) use reconfigurable subsystems. An appropriate mix of theoretical foundations and practical considerations, including algorithms architectures, applications, technologies and tools, is essential to fully exploit the possibilities offered by reconfigurable computing. The Reconfigurable Architectures Workshop aims to provide a forum for creative and productive interaction for researchers and practitioners in the area.
Topics of Interest: Authors are invited to submit manuscripts of original unpublished research in all areas of reconfigurable systems, including architectures, algorithms, applications, software and cross-cutting areas. Topics of interest include, but are not limited to:
Architectures & Algorithms
? Theoretical Interconnect and Computation Models
? Algorithmic Techniques and Mapping
? Run-Time Reconfiguration Models and Architectures
? Emerging Technologies (optical models, 3D Interconnects, devices)
? Bounds and Complexity Issues
? Analog Arrays
Reconfigurable Systems & Applications
? Reconfigurable accelerators (HPC, Bioinformatics, Multicore environments)
? Embedded systems and Domain-Specific solutions (Digital Media, Gaming, Automotive applications)
? Distributed Systems & Networks
? Wireless and Mobile Systems
? Emerging applications (Organic Computing, Biology-Inspired Solutions)
? Critical issues (Security, Energy efficiency, Fault-Tolerance)
Software & Tools
? High-Level Design Methods (Hardware/Software co-design, Compilers)
? System Support (Soft processor programming)
? Runtime Support
? Reconfiguration Techniques (reusable artifacts)
? Simulations and Prototyping (performance analysis, verification tools)
A reconfigurable computing environment is characterized by the ability of underlying hardware architectures or devices to rapidly alter (often on the fly) the functionalities of their components and the interconnection between them to suit the problem at hand. The area has a rich theoretical tradition and wide practical applicability. There are several commercially available reconfigurable platforms (FPGAs and coarse-grained devices) and many modern applications (including embedded systems and HPC) use reconfigurable subsystems. An appropriate mix of theoretical foundations and practical considerations, including algorithms architectures, applications, technologies and tools, is essential to fully exploit the possibilities offered by reconfigurable computing. The Reconfigurable Architectures Workshop aims to provide a forum for creative and productive interaction for researchers and practitioners in the area.
Topics of Interest: Authors are invited to submit manuscripts of original unpublished research in all areas of reconfigurable systems, including architectures, algorithms, applications, software and cross-cutting areas. Topics of interest include, but are not limited to:
Architectures & Algorithms
? Theoretical Interconnect and Computation Models
? Algorithmic Techniques and Mapping
? Run-Time Reconfiguration Models and Architectures
? Emerging Technologies (optical models, 3D Interconnects, devices)
? Bounds and Complexity Issues
? Analog Arrays
Reconfigurable Systems & Applications
? Reconfigurable accelerators (HPC, Bioinformatics, Multicore environments)
? Embedded systems and Domain-Specific solutions (Digital Media, Gaming, Automotive applications)
? Distributed Systems & Networks
? Wireless and Mobile Systems
? Emerging applications (Organic Computing, Biology-Inspired Solutions)
? Critical issues (Security, Energy efficiency, Fault-Tolerance)
Software & Tools
? High-Level Design Methods (Hardware/Software co-design, Compilers)
? System Support (Soft processor programming)
? Runtime Support
? Reconfiguration Techniques (reusable artifacts)
? Simulations and Prototyping (performance analysis, verification tools)
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Last modified: 2014-09-06 00:17:06