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EPTC 2010 - 2010 12th Electronics Packaging Technology Conference - (EPTC 2010)

Date2010-12-08

Deadline2010-06-30

VenueSingapore, Singapore Singapore

Keywords

Websitehttps://www.eptc-ieee.net/

Topics/Call fo Papers

You are invited to submit an abstract, presenting new
development in the following categories:
 Advanced Packaging: Wafer level packaging, 3D
integration, TSV (through Silicon Via), embedded
passives & actives on substrates, flip chip packaging,
RF-ID, 3D SiP, Packaging solutions for MEMS, MOEMS,
NEMS, Automotive electronics, optoelectronics
 Interconnection Technologies: wire bonding
technology, flip chip technology, solder alternatives
(ICP, ACP, ACF, NCP), under bump metallurgy, 3D and
TSV connections, microbump, substrate technology,
 Materials & Processes: Materials and processes for
traditional and advanced microelectronic systems, 3D
packages, MEMS, solar, green and biomedical packaging
that enhance mechanical, thermal, electrical and
optical performance as well as cost effectiveness.
 Modeling & Simulations: Electrical Modeling & Signal
Integrity, Thermal Characterization & Cooling
Solutions: Mechanical Modeling & Structural Integrity
 Quality & Reliability: Component, board and system
level reliability assessment, interfacial adhesion,
accelerated testing and models, advances in reliability
test methods and failure analysis.
 Emerging Technology: Packaging solutions for solar
photovoltaic applications, systems and packaging in the
areas of bioelectronics such as biomedical,
bioengineering, biosensors and electronics for medical
devices; wearable electronics, organic/printable
electronics; portable power supplies such as fuel cells;
and other novel packaging.

Last modified: 2010-06-18 10:06:38