PROPER 2014 - 7th Workshop on productivity and performance

Driven by current trends in microprocessor design, the number of processor cores and hardware threads available on modern supercomputers grows rapidly from generation to generation while the amount of memory per core will be decreasing. To keep pace, applications need to harness much higher degrees of parallelism while ensuring efficient use of the underlying computing resources, which can be highly concurrent many-core systems or heterogeneous accelerator architectures (or a combination of both). Additionally, applications must adhere to additional constraints, in particular with respect to power consumption (both peak and average power) and resilience.
Writing codes that run correctly and efficiently on such complex systems is extraordinarily challenging. At the same time, applications themselves are becoming more complex as well, which can be seen in emerging scale-bridging applications, the integration of fault-tolerance and uncertainty quantification, or advances in algorithms. Combined, these trends place higher and higher demands on the application development process and thus require adequate tool support for debugging and performance analysis. The PROPER workshop will serve as a forum to present novel work on scalable methods and tools for high-performance computing. The workshop covers parallel program development and analysis, debugging, correctness checking, and performance measurement and evaluation. Further topics include the integration of tools with compilers and the overall development environment, as well as success stories reporting application performance, scalability, reliability, power and energy optimization, or productivity improvements that have been achieved using tools.
The workshop is supported by the Virtual Institute - High Productivity Supercomputing (VI-HPS), an initiative to promote the development and integration of HPC programming tools.
Workshop Topics
Tools and tool approaches for parallel program development and analysis
Infrastructure for building parallel program development and analysis tools
Correctness checking and program verification
Performance measurement and evaluation
Success stories about optimization or parallel scalability achieved using tools
Workshop Program
to be announced
Instructions for Final Papers
Papers are limited to 10 pages and must follow the LNCS style guides (linked below). All accepted papers will be included in the conference proceedings (electronic proceedings only), published by Springer in the LNCS series. Authors of accepted papers will be required to sign a Springer copyright form and submit all source documents of the paper (preferably as Latex files). At least one author of an accepted paper must register for and attend the workshop for inclusion in the proceedings.
A preliminary version of all accepted papers in Springer LNCS format (10 pages max.) is due on July 30th (firm deadline). This version will be made available to attendees of the PROPER workshop. Please send these papers to the workshop chair (see below) by email.
Camera-ready revised versions of the workshop papers, which will be included in the official electronic proceesings, are due by beginning of October 2014 and must also be in Springer LNCS format (10 pages max.). The final papers for the workshop proceedings will be collected via Easychair, which will be linkd from this page.
LNCS style guides:
Springer's authors guidelines: here
Download Latex LNCS: zip
Springer copyright form: pdf
Important Dates
Note: the deadlines are synchronized across all EuroPar workshops
May 30th: submission deadline for full papers
July 4th: notification of acceptance
July 25th: EuroPar early registration deadline
July 30th: Preliminary papers due
August 25th-26th: PROPER workshop (exact day to be announced)
October 3rd: final paper versions due for Springer proceedings
Program Committee:
Andreas Knüpfer, TU Dresden (chair)
Denis Barthou, INRIA
David Böhme, German Research School for Simulation Sciences
Karl Fürlinger, LMU München
Michael Gerndt, TU München
José Gracia, HLRS
Kevin Huck, University of Oregon
Koji Inoue, Kyushu University
Ignacio Laguna, Lawrence Livermore National Laboratory
John Mellor-Crummey, Rice University
Matthias Müller, RWTH Aachen University
Shirley Moore, University of Texas at El Paso
Martin Schulz, Lawrence Livermore National Laboratory
Nathan Tallent, Pacific Northwest National Laboratory
Jan Treibig, RRZE, Friedrich-Alexander-Universität Erlangen-Nürnberg
Anh Vo, Microsoft
Brian Wylie, Jülich Supercomputing Centre
Contact
José Gracia
High Performance Computing Center Stuttgart (HLRS)
University of Stuttgart
Email gracia-AT-hlrs.de