DPNoC 2014 - 2014 International Workshop on the Design and Performance of Networks on Chip (DPNoC 2014)

2014 International Workshop on the Design and Performance
of Networks on Chip (DPNoC 2014)
August 17-20, 2014, Niagara Falls, Ontario, Canada
in conjunction with the
The 9th International Conference on Future Networks and Communications (FNC 2014)
http://cs-conferences.acadiau.ca/fnc-14/
SCOPE AND OBJECTIVES
The advance in VLSI technology has led to the emergence of Systems on Chips (SoC), where a large number of intellectual property cores are integrated onto a single chip. Systems on chip are of high computing performance and how components communicate is the key issue in these systems. The bus-based approach used in traditional systems represents a bandwidth bottleneck in SoC in addition to the non-scalability problem. Therefore light weight networks, known as Network on Chip (NoC), have emerged. NoCs as a promising alternative to the bus-based approach. They have their roots form data communication networks and inherit all issues faced in data communication networks with an extra challenge which is space limitation. As a result, new challenges and issues on the design and implementation of these networks have attracted the attention of several researchers.
The workshop on the Design and Performance of Networks on Chip (DPNoC'2014) will represent an international forum for researchers from both academia and industry to expose the latest trends, research findings, and emerging issues in networks on chip.
The Workshop topics include (but are not limited to) the following:
Technology constraints on NoCs
System and Micro Architecture for NoCs
Technology constraints on NoCs
System and Micro Architecture for NoCs
Flow control
Switching techniques
Routing protocols
Network modeling and performance evaluation
Schedling and Application mapping onto NoC
NOC scalability
Fault tolerance/reliability in NoC
Wireless NoC
NoCs Applications and Design
Multi-Core Systems
Floorplanning, Scheduling, and IP Mapping
FPGA-based implementation of reconfigurable NoCs
Wireless Network-on-Chip
INSTRUCTIONS FOR PAPER SUBMISSIONS:
You are invited to submit original and unpublished research works on above and other topics related to Mobile Applications. Submitted papers must not have been published or simultaneously submitted elsewhere. Please, indicate clearly the corresponding author and include up to 6 keywords and an abstract of no more than 400 words.
Publication: All NoC-2014 accepted papers will be printed in the conference proceedings published by Elsevier Science in the open-access Procedia Computer Science series on-line. Procedia Computer Sciences is hosted on www.Elsevier.com and on Elsevier content platform ScienceDirect (www.sciencedirect.com), and will be freely available worldwide. All papers in Procedia will also be indexed by Thomson Reuters' Conference Proceeding Citation Index http://thomsonreuters.com/conference-proceedings-c.... The papers will contain linked references, XML versions and citable DOI numbers. You will be able to provide a hyperlink to all delegates and direct your conference website visitors to your proceedings. All accepted papers will also be indexed in DBLP (http://dblp.uni-trier.de/).