RTAS 2014 - The 20th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2014)

RTAS’14, the twentieth in a series of annual conferences sponsored by the IEEE, will be held in Berlin, Germany, as part of the Cyber-Physical Systems Week (CPSWeek) in April, 2014. CPS Week 2014 will bring together leading conferences, including the International Conference on Information Processing in Sensor Networks (IPSN’14), the International Conference on Hybrid Systems (HSCC’14), the International Conference on Cyber-Physical Systems (ICCPS’14), the International Conference on High Confidence Networked Systems (HiCoNS’14) and RTAS’14.
RTAS’14 invites papers describing original systems and applications, case studies, methodologies and applied algorithms that contribute to the state of practice in the broad field of embedded and open real-time systems and computing. The scope of RTAS’14 will consist of three tracks: (1) Applications, Systems, RTOSs and Tools, (2) Applied Methodologies and Foundations, and (3) Hardware/Software Integration and Co-design.
Track 1: Applications, Systems, RTOSs and Tools. Papers submitted to this track are aimed at presenting specific systems and implementations. They must introduce the application context and clearly define motivating application examples. Authors must introduce the related research challenges and illustrate the theoretical foundations of the methodology adopted in the considered application/tool/RTOS, with applicability. Papers in this session must include a section on experimental results with a real implementation of the proposed system or applicability to an industrial case study or working system. The experiment/use case discussion must highlight problems/bottlenecks encountered in the implementation and show the measurements/evaluations on the prototype. Simulation-based results are acceptable when the authors motivate the impossibility of an actual system development.
Track 2: Applied Methodologies and Foundations. Papers submitted to this track are aimed at basic methodologies and algorithms that are applicable to real systems to solve specific problems. Authors must introduce the application context and clearly define motivating application examples. The system models and any assumptions used in the derivation of the results must be applicable to real systems and reflect actual needs. Papers must also include a section on experimental results, preferably on real case studies or models of real systems, although the use of synthetic workloads and models is acceptable if motivated. Papers failing to address applicability as defined in the previous guidelines are not considered as acceptable.
Track 3: Hardware-Software Co-design. This track focuses on design methodologies and tools for hardware/software integration and co-design of modern embedded systems for real-time applications. General topics relevant to this track include, but are not limited to, architecture description languages and tools, WCET analysis, software architectures, design space exploration, synthesis and optimization. Of special interest are SoC design for real-time applications, special purpose functional units, specialized memory structures, multi-core chips and communication aspects, FPGA simulation and prototyping, software simulation and compilation for novel architectures and applications, as well as power, timing and predictability analyses.
SUBMISSION OF PAPERS
All papers must be submitted electronically in PDF format, following the IEEE conference proceedings IEEE conference proceedings format and must describe original work not previously published or concurrently submitted elsewhere. The main body of each submitted paper is limited to 10 pages. Additionally, each submission may include an optional appendix with supplemental material that will be read at the discretion of the program committee; this appendix is limited to two pages (for 12 pages total). Authors of accepted papers that exceed 10 pages (due to the inclusion of an optional appendix) will be required to pay a fee of $50 for each page beyond the tenth. Submissions (including the optional appendix) must be formatted according to IEEE conference paper guidelines.
Authors are advised to format their papers so that the case for acceptance is made clear in the main body of the paper (i.e., within the first 10 pages). The optional appendix can be used (for example) to provide additional performance graphs or to provide more detailed versions of proofs that are sketched in the main body of the paper.
A submission based on previous work presented in a workshop with no digital object identifier (DOI) is eligible for acceptance. Submissions based on a previous paper published in a workshop proceedings having a D.O.I. are eligible for acceptance, provided they contain at least 30% of new material. The Chair of the Technical Program Committee makes the final determination on acceptance or rejection of acceptable papers.