VLSI 2014 - 27th International Conference on VLSI Design

Authors are invited to submit original abstracts and papers through paper submission system: https://www.easychair.org/account/signin.cgi?conf=... after registering for an "easychair" account as per dates given below. The conference website is at: http://vlsidesignconference.org. The areas in which papers could be submitted are:
1. Embedded Systems
Embedded system hardware/software co-design; Reconfigurable hardware design; Embedded software; Real-time operating systems; Middleware and virtualization; Embedded multi-cores and many-cores; Communications; Encryption, security, compression; Hybrid systems-on-chip; Sensor networks; Programmable devices; Hardware-software co-verification; Embedded system reliability; Embedded applications (automotive, mobile, medical, etc.), platforms, and case studies
2. Digital Design
Low-power design; Asynchronous design; Package and board design
3. Analog/RF Design
Low-power design; Analog, mixed-signal, and RF systems; Package and board design
4. System-level Design/ESL
System-level design methodology; Gigascale design methodology; Multicore systems; Processor and memory design; Concurrent interconnect; Networks-on-chip; Defect tolerant architectures
5. Logic Synthesis and Physical Design
Logic synthesis; Technology mapping; Asynchronous synthesis; Physical design; Floor planning; Placement; Routing; Clock Design; Layout issues in design for manufacturability
6. Test and Reliability
Fault modeling/simulation; ATPG; DFT; Delay test; Fault-tolerance; Online test; AMS/RF test; Board-level and system-level test; Silicon debug, post-silicon validation; Memory test; Reliability test
7. Functional Verification
Behavioral Simulation; RTL Simulation; Coverage Driven Verification; Assertion Based Verification; Gate-level simulation; Emulation; Hardware Assisted Verification; Formal Verification; Equivalence Checking; Verification Methodologies
8.Device/circuit simulation and modeling
Design verification; Signal integrity; Technology modeling-design-simulation; Analog/mixed-signal simulation; Multi-domain simulation; Numerical methods; Device modeling; Timing analysis; Asynchronous timing; Device/circuit level variability models; Reliability simulation
9.Emerging Technologies
Issues in nano-CMOS technologies; MEMS; CMOS sensors; CAD/EDA methodologies for nanotechnology; Non-classical CMOS; Post-CMOS devices; Biomedical circuits and systems
Kindly see below the "Important Dates":
Due Date for Abstract Submission: July 24, 2013
Due Date for Full Paper Submission: July 31, 2013
Due date of Acceptance Notification: September 17, 2013
Due date for Camera ready paper : October 10, 2013
Please note once again the Conference Date which is: January 5-9, 2014. For additional details you may go through the attached flyer please.
We wish to welcome all of you to IIT Bombay, Mumbai,India for this conference.
A.N.Chandorkar
General Chair, VLSI Design -2014
Institute Chair Professor and Emeritus Fellow
EE Department, IIT Bombay, Powai, Mumbai- 400076, India