WRTLT 2013 - the 14th workshop on register transfer level (RTL) and high level testing

The purpose of this workshop is to bring researchers and practitioners of VLSI testing from all over the world together to exchange ideas and experiences in register transfer level (RTL) and high level testing. WRTLT'13, the 14th workshop, will be held in conjunction with the 22th Asian Test Symposium in Jiaosi, Taiwan. This workshop provides an ideal forum for interactive discussion on important topics for system-on-a-chip(SoC) and 3D ICs. Areas of interest include but are not limited to:

• RTL ATPG, RTL DFT, RTL BIST, High level synthesis for testability


• High level testing: RTL/behavior level testing


• Functional fault modeling, High level test bench generation


• 3D IC testing


• SoC/Noc testing, Test scheduling, Core-based testing, Interconnect testing


• Reliable SoC : System level reliability, Self repair, Fault tolerant SoC


• Microprocessor testing , design Verification


• Low power testing,


• Test compression, ATPG, DFT, BIST


• Hardware Trojan Detection, secure testing