ATVA 2013 - International Symposium on Automated Technology for Verification and Analysis

The purpose of ATVA is to promote research on theoretical and practical aspects of automated analysis, verification and synthesis by providing a forum for interaction between the regional and the international research communities and industry in the field. The previous events were held in Taiwan - 2003-5, Beijing - 2006, Tokyo - 2007, Seoul - 2008, Macao - 2009, Singapore - 2010, Taiwan - 2011, and Thiruvananthapuram, India - 2012.
Scope
ATVA 2013 solicits high quality submissions in areas related to the theory and practice of automated analysis and verification of hardware and software systems. Topics of interest include, but are not limited to:
Formalisms for modeling hardware, software and embedded systems
Specification and verification of finite-state, infinite-state and parameterized system
Program analysis and software verification
Analysis and verification of hardware circuits, systems-on-chip and embedded systems
Analysis of real-time, hybrid, priced/weighted and probabilistic systems
Deductive, algorithmic, compositional, and abstraction/refinement techniques for analysis and verification
Analytical techniques for safety, security, and dependability
Testing and runtime analysis based on verification technology
Analysis and verification of parallel and concurrent hardware/software systems
Verification in industrial practice
Applications and case studies
Theory papers should preferably be motivated by practical problems, and applications should be based on sound theory and should solve problems of practical interest.