ULIS 2013 - 14th International Conference on ULTIMATE INTEGRATION ON SILICON

The aim of the ULIS Conference is to provide an open forum for the presentation and discussion of recent research in technology, physics, modelling, simulation and characterisation of advanced nanoscale silicon and silicon compatible devices in the More Moore, More than Moore and Beyond CMOS domains. Topics include, but are not limited to:
Nanometre scale devices: physics, technology, characterisation techniques and evaluation metrics for high performance, low power, low standby power, high frequency and memory applications.
New functionality in silicon compatible nanostructures and nanodevices (Nanowires, CNT, Graphene...) representing the More than Moore domain for Nanosensing, Energy harvesting, RF, Electronic cooling...)
CMOS scaling perspectives; device / circuit level performance evaluation; switches and memory scaling.
New channel materials for CMOS electronics: strained Si, strained SOI, SiGe, GOI, III-V and high mobility materials for MOSFET; carbon based electronics; carbon nanotubes; graphene based devices.
Thin gate dielectrics: first and second generation high-k materials for switches and memory.
Alternative transistor architectures and silicon nanowires including PDSOI, FDSOI, DGSOI, FinFETs, MuGFETs, vertical MOSFET, IMOS and tunnel FET structures. Benchmarking of new architectures w.r.t. bulk CMOS.