ASP-DAC 2013 - ASP-DAC 2013 University LSI Design Contest
Topics/Call fo Papers
ASP-DAC 2013 University LSI Design Contest *
* http://www.aspdac.com/aspdac2013/ *
* Jan. 22-25, 2013 *
* Pacifico Yokohama, Yokohama, Japan *
*************************************************************
Aims of the Contest:
As a unique feature of ASP-DAC 2013, the University LSI Design
Contest will be held. The aim of the Contest is to encourage
education and research on VLSI design at universities and other
educational organizations. We solicit designs that fit in one or
more of the following categories:
(1) Designed, and actually implemented on chips in universities or
other educational organizations during the last two years;
(2) Designs that report actual measurements from implementations;
(3) Innovative design prototypes.
Interesting or excellent designs selected will be honored by
providing the opportunities for presentation in a special session at
the conference.
Award(s) will be given to a few numbers of outstanding designs,
selected from those presented at the conference.
Areas of Design:
Application areas or types of circuits of the original LSI circuit
designs include (but are not limited to):
(1) Analog, RF and Mixed-Signal Circuits,
(2) Digital Signal Processing,
(3) Microprocessors,
(4) Custom ASIC.
Methods or technology used for implementation include:
(a) Full Custom and Cell-Based LSIs, (b) Gate Arrays, (c) FPGA/PLDs.
Submission of Design Descriptions:
A camera-ready summary is requested to be prepared within 2 pages
including figures, tables, and references. It is strongly
recommended that measured experimental results and a chip micrograph
are included in the original LSI circuit design. Please do not
submit the same paper as a regular paper.
Specification of the submission format will be available at
http://www.aspdac.com/aspdac2013/
New Deadline for summary: 5PM JST (UTC+9) Aug 3 (Fri.), 2012
Notification of acceptance: Sep. 12 (Wed.), 2012 Deadline for camera-
ready: 5PM JST (UTC+9) Nov. 14 (Wed.), 2012
Review:
Submitted designs will be reviewed by the Design Contest Committee
in a process similar to the review process for the technical papers.
The following criteria will be applied in the selection of designs:
(1) Reliability of design and implementation,
(2) Quality of implementation,
(3) Performance of the design,
(4) Novelty of application, algorithm, architecture,
(5) Others.
Interesting or excellent designs selected will be presented at a
special session of the conference.
Presentation:
An author of each selected design will be required to make a short
presentation at a special session of ASP-DAC 2013. A digest of each
design to be presented will be included in the conference
proceedings.
Contact Email:
aspdac2013-udc-AT-mls.aspdac.com
Design Contest Co-Chairs:
Tetsuo Hironaka (Hiroshima City University) Hiroshi Kawaguchi (Kobe
University)
* http://www.aspdac.com/aspdac2013/ *
* Jan. 22-25, 2013 *
* Pacifico Yokohama, Yokohama, Japan *
*************************************************************
Aims of the Contest:
As a unique feature of ASP-DAC 2013, the University LSI Design
Contest will be held. The aim of the Contest is to encourage
education and research on VLSI design at universities and other
educational organizations. We solicit designs that fit in one or
more of the following categories:
(1) Designed, and actually implemented on chips in universities or
other educational organizations during the last two years;
(2) Designs that report actual measurements from implementations;
(3) Innovative design prototypes.
Interesting or excellent designs selected will be honored by
providing the opportunities for presentation in a special session at
the conference.
Award(s) will be given to a few numbers of outstanding designs,
selected from those presented at the conference.
Areas of Design:
Application areas or types of circuits of the original LSI circuit
designs include (but are not limited to):
(1) Analog, RF and Mixed-Signal Circuits,
(2) Digital Signal Processing,
(3) Microprocessors,
(4) Custom ASIC.
Methods or technology used for implementation include:
(a) Full Custom and Cell-Based LSIs, (b) Gate Arrays, (c) FPGA/PLDs.
Submission of Design Descriptions:
A camera-ready summary is requested to be prepared within 2 pages
including figures, tables, and references. It is strongly
recommended that measured experimental results and a chip micrograph
are included in the original LSI circuit design. Please do not
submit the same paper as a regular paper.
Specification of the submission format will be available at
http://www.aspdac.com/aspdac2013/
New Deadline for summary: 5PM JST (UTC+9) Aug 3 (Fri.), 2012
Notification of acceptance: Sep. 12 (Wed.), 2012 Deadline for camera-
ready: 5PM JST (UTC+9) Nov. 14 (Wed.), 2012
Review:
Submitted designs will be reviewed by the Design Contest Committee
in a process similar to the review process for the technical papers.
The following criteria will be applied in the selection of designs:
(1) Reliability of design and implementation,
(2) Quality of implementation,
(3) Performance of the design,
(4) Novelty of application, algorithm, architecture,
(5) Others.
Interesting or excellent designs selected will be presented at a
special session of the conference.
Presentation:
An author of each selected design will be required to make a short
presentation at a special session of ASP-DAC 2013. A digest of each
design to be presented will be included in the conference
proceedings.
Contact Email:
aspdac2013-udc-AT-mls.aspdac.com
Design Contest Co-Chairs:
Tetsuo Hironaka (Hiroshima City University) Hiroshi Kawaguchi (Kobe
University)
Last modified: 2012-07-25 22:27:34