UCHPC 2012 - The 5th Workshop on UnConventional High Performance Computing 2012 (UCHPC 2012)

As the word "UnConventional" in the title suggests, the workshop focuses on hardware and platforms for HPC, which were not intended for HPC in the first place. Reasons could be raw computing power, good performance per watt, or low cost in general. To address this unconventional hardware, often, new programming approaches and paradigms are required to make best use of it. Thus, a second focus of the workshop is on innovative new programming models for unconventional hardware and how to best combine its computing power with more conventional systems. To this end, UCHPC tries to capture solutions for HPC which are unconventional today but could become conventional and significant tomorrow.
For example, the computing power of platforms for games recently raised rapidly. This motivated the use of GPUs for computing (GPGPU), or even building computational grids from game consoles. The trend of integrating GPUs on processor chips seem to be very beneficial for use of both parts for HPC. Other examples for "unconventional" hardware are embedded, low-power processors, upcoming many-core architectures, FPGAs or DSPs. Thus, interesting devices for research in unconventional HPC are not only standard server or desktop systems, but also relative cheap devices due to being mass market products, such as smartphones, netbooks, tablets and small NAS servers. Especially smartphones seem to become more performance hungry every day. Only imagination sets the limit for use of the mentioned devices for HPC.
Topics
The goal of the workshop is to present latest research in how hardware and software (yet) unconventional for HPC is or can be used to reach goals such as best performance per watt. UCHPC also covers according programming models, compiler techniques, and tools. Thus, suggested topics for papers include, but are not limited to the following:
Innovative use of hardware and software unconventional for HPC
HPC applications or visualizations in connection with HPC on GPUs (GPGPU), using GPUs embedded on processor dies (as found in AMD Fusion/APUs, NVidia Denver, Intel Ivy Bridge), Intel's MIC and SCC, low power/embedded processors (including DSPs, Adapteva Epiphany), FPGAs (e.g. Convey), Tilera's tile-based many-core processors, IBM Cell BE, accelerators, visualization cards, etc.
Cluster/Grid solutions using unconventional hardware, e.g. clusters of game consoles, nodes using GPUs, Low Power/Embedded Processors, MPSoCs, new many-cores from Intel and/or ARM designs, Mac Minis/AppleTVs, FPGAs etc.
Heterogeneous computing on hybrid platforms
Work on and use of new programming models and paradigms needed to support unconventional hardware, and hybrid/hierarchical combinations with more conventional systems. Examples are OpenACC, OpenCL, Cilk+, and task-based approaches for heterogeneous systems
Performance and scalability studies in HPC using unconventional hardware
Reconfigurable Computing for HPC
Performance modeling, analysis and tools for HPC with unconventional hardware
New or adapted/extended (parallel) programming models for HPC with unconventional hardware
Program
TBD
Paper Submission, Registration, and Publication
Workshop papers can not exceed ten single-spaced, single-column pages (LNCS style). Submission implies that at least one author will register for the workshops at Euro-Par 2012 and present the paper in the workshop session, if accepted.
Upload your submission to our submission server in PDF format. It must not be simultaneously submitted to the main conference or any other publication outlet.
For the workshop, we will prepare handouts with the revised papers. These will be published after the conference in the workshop proceedings of Euro-Par 2012, part of the LNCS series of Springer.
Important Dates
June 4: Submission deadline
July 6: Notification of acceptance
July 20: Camera ready, revised papers due
August 27 - 31: Conference with workshops
Committees
International Program Committee
David A. Bader, Georgia Tech, US
Michael Bader, Technische Universität München, DE
Denis Barthou, Universite de Bordeaux, FR
Lars Bengtsson, Chalmers University of Technology, SE
Giorgos Dimitrakopoulos, Democritus University of Thrace, GR
Karl Fürlinger, LMU, DE
Dominik Göddeke, TU Dortmund, DE
Georg Hager, University Erlangen-Nuremberg, DE
Anders Hast, Uppsala University, SE
Ben Juurlink, TU Berlin, DE
Rainer Keller, Hochschule für Technik, Stuttgart, DE
Gaurav Khanna, University of Massachusetts Dartmouth, US
Harald Köstler, University Erlangen-Nuremberg, DE
Manfred Mücke, University of Vienna, AT
Andy Nisbet, Manchester Metropolitan University, UK
Ioannis Papaefstathiou, Technical University of Crete, GR
Franz-Josef Pfreundt, Fraunhofer ITWM, DE
Bertil Schmidt, University Mainz, DE
Dimitrios Soudris, National Technical University of Athens, GR
Ioannis Sourdis, Chalmers University of Technology, SE
Thomas Steinke, Zuse Institute, Berlin, DE
Josef Weidendorfer, Technische Universität München, DE
Jan-Philipp Weiss, KIT, DE
Stephan Wong, Delft University of Technology, NL
Ren Wu, HP Labs, Palo Alto, US
Peter Zinterhof jun., University of Salzburg, AT
Yunquan Zhang, Chinese Academy of Sciences, Beijing, CN
UCHPC Steering Committee
Lars Bengtsson, Chalmers University of Technology, SE
Anders Hast, Uppsala University, SE
Josef Weidendorfer, Technische Universität München, DE
Jan-Philipp Weiss, KIT, DE
Ren Wu, HP Labs, Palo Alto, US
UCHPC'12 Workshop Organizers
Anders Hast, Uppsala University, SE
Josef Weidendorfer, Technische Universität München, DE
Jan-Philipp Weiss, KIT, DE