HEART 2012 - The 3rd International Workshop on Highly Efficient Accelerators and Reconfigurable Technologies (HEART2012)

• Workshop Dates: May 31 - June 1, 2012


• FPGA Design contest: May 30, 2012


• Camera-ready due: April 26, 2012 EXTENDED FIRM


• FPGA Design Contest Paper Submission: April 20, 2012


• Author notification: April 13, 2012 EXTENDED FIRM


• FPGA Design Contest entry: March 26, 2012


• Paper submission: March 14, 2012 EXTENDED FIRM

The 3rd International Workshop on Highly Efficient Accelerators and Reconfigurable Technologies (HEART: http://www.isheart.org/HEART2012) is a forum to present and discuss new research on accelerators and the use of reconfigurable technologies for high-performance and/or power-efficient
computation. Submissions are solicited on a wide variety of topics related to the acceleration for high-performance computation, including but not limited to:

• Architectures and systems:
  
  
  
  • Novel systems/platforms for efficient acceleration based on FPGA, GPU, CELL/B.E and other devices
  
  
  • Heterogeneous processors/systems for scalable, high-performance, high-reliability and/or low-power computation
  
  
  • Reconfigurable/configurable hardware and systems including IP-cores, embedded systems, SoCs and cluster/grid/cloud computing systems for scalable, high-performance and/or low-power processing
  
  
  • High-performance custom-computing processors/systems
  
  
  • Novel architectures and device technologies that can be applied to efficient acceleration, including many-core architectures, NoC architectures, 3D-stacking technologies and optical devices
  
  
  
  


• Software and applications:
  
  
  
  • Novel applications for efficient acceleration systems/platforms, and custom computing
  
  
  • Compiler techniques and programming languages for efficient acceleration systems/platforms, including many-core processors, GPUs, FPGAs and other reconfigurable/custom processors
  
  
  • Run-time techniques for acceleration, including Just-in-Time compilation and dynamic partial-reconfiguration
  
  
  • Performance evaluation and analysis for efficient acceleration
  
  
  • High-level synthesis and design methodologies for heterogeneous, reconfigurable and/or custom processors/systems
  
  
  
  

In order to encourage open discussion on future directions, the program committee will provide higher priority for papers that present highly innovative and challenging ideas.

We will accept regular and short papers for oral and poster
presentation, respectively. All the accepted regular papers will be
published in the post-proceedings that will be published as a
special issue of ACM SIGARCH Computer Architecture News (ACM CAN) and
will also be available in ACM Digital Library (http://dl.acm.org/sigarch/newsletter/).
By submitting your work to the HEART2012 workshop, you grant permission for ACM to publish the
material in print and digital formats in ACM's Computer Architecture News and the ACM archive. The short papers will be included in the workshop handout distributed at the workshop. One of the authors must attend the workshop and present their work as a condition of publication.

All papers must be no more than 6 pages (two columns, US letter size, 10 points for main body text) in length and prepared in PDF format. For double-blind review, manuscripts must NOT identify
authors; names of authors, affiliations, e-mail addresses and self-references should be blanked out. Papers that identify authors may be rejected without review.
Full formatting and submission instructions are available at the HEART2012 web-site;
http://www.cs.tsukuba.ac.jp/~yoshiki/heart//HEART2... .

Keynote Lectures

FPGA Design Contest