NOC 2012 - Special session on: Trends in in On-Chip Communications Networks

http://www.juit.ac.in/ISPCC/spl_sessions.php
Special session on: “Trends in in On-Chip Communications Networks”
Organizers(s)
MOHAMMAD AYOUB KHAN,
Centre for Development of Advanced Computing(C-DAC)
Ministry of Communications and IT, Government of India
B-30, Sector 62, NOIDA, INDIA
ayoub-AT-ieee.org

ABDUL QUAIYUM ANSARI
Department of Electrical Engineering
Jamia Millia Islamia (A central Government University)
New Delhi-25, INDIA
aqansari-AT-ieee.org

On-Chip is an emerging communication paradigm for large VLSI systems implemented on a single silicon chip. This uses as a new approach to design complex System-on-a-chip (SoCs). The NoC-based systems can accommodate multiple complex (heterogeneous) SoC designs. In any on-Chip communications system, cores such as processor, memories, and customized IP blocks exchange data using a computer network protocol and physical infrastructure of on-chip networks. This special session addresses all aspects related to concepts, implementations and applications of on-chip communications as well as related EDA tools and on-Chip communication simulators. Nonetheless, its focus is on advanced issues and interdisciplinary topics like system control, design flow, application studies and the outlook on future developments in on-chip communications design.
Papers on any of the following and related topics will be considered for the special session:
SUBJECT COVERAGE
1. Emerging topology and router architecture for on-Chip communications
2. Memory Architecture for NoC
3. Power and Energy issues
4. Clockless architectures and asynchronous communication techniques
5. Routing algorithm and micro architecture
6. Switching and Control flow techniques
7. QoS Parameters in on-Chip communications
8. On-Chip communication simulators
9. Reliability issues in on-Chip communications
10. Emerging technologies for on-Chip communications (Optics, Nanowires etc)
11. On-Chip communication case studies