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EXADAPT 2012 - 2nd International Workshop on Adaptive Self-Tuning Computing Systems for the Exaflop Era (EXADAPT 2012)

Date2012-03-03

Deadline2011-12-02

VenueLondon, UK - United Kingdom UK - United Kingdom

Keywords

Websitehttp://www.dcs.gla.ac.uk/conferences/resolve12/

Topics/Call fo Papers

Modern large scale computing systems are rapidly evolving and may soon feature millions of cores with exaflop performance. However, this leads to a tremendous complexity with an unprecedented number of available design and optimization choices for architectures, applications, compilers and run-time systems. Using outdated, non-adaptive technology results in an enormous waste of expensive computing resources and energy, while slowing down time to market.
The 1st International Workshop on Self-tuning, Large Scale Computing Systems for Exaflop Era is intended to become a regular inter-disciplinary forum for researchers, practitioners, developers and application writers to discuss ideas, experience, methodology, applications, practical techniques and tools to improve or change current and future computing systems using self-tuning technology. Such systems should be able to automatically adjust their behavior to multi-objective usage scenarios at all levels (hardware and software) based on empirical, dynamic, iterative, statistical, collective, bio-inspired, machine learning and alternative techniques while fully utilizing available resources.

All papers will be peer-reviewed including short position papers and should include unpublished ideas on how to simplify, automate and standardize the design, programming, optimization and adaptation of large-scale computing systems for multiple objectives to improve performance, power consumption, utilization, reliability and scalability including the following topics:

whole system parameterization and modularization to enable self-tuning across the whole hardware and software stack
transformation space of static, JIT and source-to-source compilers
run-time resource management/scheduling
task/process/thread/data migration
design space of architectures including heterogeneous multi-cores, accelerators, memory hierarchy and IO
propagation and usage of the feedback between various system layers
static and dynamic code and data partitioning/modification for self-tuning
application conversion to support multi-level, hybrid parallelization
modification of existing tools and applications to enable auto-tuning
resource and contention aware scheduling
performance, power and reliability evaluation methodologies
scalable performance evaluation tools
detection, classification, and mitigation of resource contentions
collaborative optimization repositories and benchmarks
characterization of static program constructs
characterization of dynamic program behavior under various system load scenarios
software/hardware co-design and co-optimization
analysis of interactions between different parts of a large application
prediction of optimizations and architectural designs based on prior knowledge
scalable system and processor simulation
hardware support for self-tuning and scheduling
virtualization
fault-tolerance

Last modified: 2011-10-24 17:58:59