HiPEAC 2012 - 7th International Conference on High Performance Embedded Architectures and Compilers (HiPEAC)
Topics/Call fo Papers
The challenges faced by the high-performance general-purpose and embedded worlds are converging. The embedded market evolves rapidly, quickly expanding the capabilities of new devices, and the requirements of these new applications demand technologies that not long ago were in the realm of high-performance computing. Conversely, the energy and cost constraints typical of the embedded world are now also among the most important design criteria for general purpose computing systems. Because performance no longer automatically increases with advances in semiconductor technology, it has become essential to discover new paths to optimize performance, energy and cost across software and hardware. The HiPEAC conference provides a forum for computer and compiler architects in the field of high performance architecture and compilation for embedded and general-purpose systems, with a special emphasis on cross-cutting research that can be applied to both. The conference aims at the dissemination of advanced scientific knowledge and the promotion of international contacts among scientists from academia and industry. Topics of interest include, but are not limited to:
Processor architectures
Memory system optimization
Power, performance and implementation efficient designs
Reliability and real-time support in processors, compilers and run-time systems
Network and security processors
Application-specific processors and accelerators
Reconfigurable architectures
Simulation and methodology
Hardware and run-time support for programming languages
Compiler techniques
Feedback-directed optimization
Program characterization and analysis techniques
Dynamic compilation, adaptive execution, and continuous profiling/optimization
Binary translation/optimization
Code size/memory footprint optimizations
HIGHLIGHTS
New publication model with ACM TACO
Keynote presentations
Main track of invited presentations
Parallel tracks with workshops
Tutorials
Student poster sessions
Industrial exhibits
Updates on ongoing FP7 projects in computing systems
DEADLINES
Workshops/tutorials: June 1, 2011
Papers: July 15, 2011
Posters: October 15, 2011
Processor architectures
Memory system optimization
Power, performance and implementation efficient designs
Reliability and real-time support in processors, compilers and run-time systems
Network and security processors
Application-specific processors and accelerators
Reconfigurable architectures
Simulation and methodology
Hardware and run-time support for programming languages
Compiler techniques
Feedback-directed optimization
Program characterization and analysis techniques
Dynamic compilation, adaptive execution, and continuous profiling/optimization
Binary translation/optimization
Code size/memory footprint optimizations
HIGHLIGHTS
New publication model with ACM TACO
Keynote presentations
Main track of invited presentations
Parallel tracks with workshops
Tutorials
Student poster sessions
Industrial exhibits
Updates on ongoing FP7 projects in computing systems
DEADLINES
Workshops/tutorials: June 1, 2011
Papers: July 15, 2011
Posters: October 15, 2011
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Last modified: 2011-08-02 16:52:21