ResearchBib Share Your Research, Maximize Your Social Impacts
Sign for Notice Everyday Sign up >> Login

COLOC 2018 - 2nd workshop on data locality

Date2018-08-27 - 2018-08-28


VenueTorino, Italy Italy



Topics/Call fo Papers

A well-known handicap for HPC applications running on modern highly parallelized and heterogeneous HPC platforms is that an increasing amount of time is spent in communication and data transfers; thus, it is necessary to design, implement and validate new approaches to optimize process placement and data locality management.
The goal of this workshop is to gather the community around this subject.
Areas or research interest include, but are not limited to:
Modeling node topology
Modeling network and communication
Performance analysis of application to understand affinity
Affinity metrics
Runtime support for extracting affinity from application
Code analysis in order to understand communication pattern
Algorithm to improve locality
Language, abstraction and compiler support for data locality
Data structure and library support to better manage memory access
Runtime-system and dynamic locality management
System-scale locality optimization
Validating locality optimization at thread or process level
Memory management
Locality management in large-scale application
Impact of Locality to application
The COLOC workshop seeks contribution targeting (i) developing methods and tools enabling to model all resources of a computing platform using a hierarchical topology that describes the characteristics of these resources, (ii) enhancing upper software layers (resource manager; data communication libraries; performance analysis tools) to better manage data placement, thereby maximize application performance, and (iii) validating data-locality optimization, using applications from different domains. The aim of this workshop is to present the main recent results in the domain of parallel computing where locality and topology is used to enhance performance. Concerning, application domain, we will seek contribution from several fields. First, we will target high-performance computing. However, we also look at contributions on data locality and energy efficiency, data locality in the context of BigData or deep learning applications.
Targeted audience
HPC application developers interested in exploring new ways to optimize their code.
HPC centers and clusters managers to enhance cluster usage and application efficiency.
Academics and researchers in scientific computing.
What and how to submit a paper
Paper, in PDF format, should be submitted to the workshop easychair submission site (Link here, choose “COLOC – Workshop on Data Locality“). Papers should be formatted according to the LNCS style that can be downloaded from the springer website. Page limit is 12. It includes everything (text, figures, references) and will be strictly enforced by the submission system. Complete LaTeX sources must be provided for accepted papers. Papers should be typeset using the single column format. All submitted research papers will be peer-reviewed. Only contributions that are not submitted elsewhere or currently under review will be considered. Authors of accepted papers will have to sign a Springer copyright form. Short papers (2-4 pages) are also accepted submission. However, only paper which camera-ready version will be longer than 10 pages will be included in the proceedings published by Springer in the ARCoSS/LNCS series. Accepted paper will be presented during the workshop session of the Euro-Par 2018 conference in Turin, Italy.
Program chair
Emmanuel Jeannot, Inria France (
Program Committee
George Bosilca, UTK, USA
Florina Ciorba, University of Basel, Switzerland
Matthias Diener, University of Illinois at Urbana-Champaign, USA
Anshu Dubey, Argonne Natl Lab, USA
Karl Fuerlinger, Ludwig-Maximilians-University, München, Germany
Brice Goglin, Inria, France
Aleksandar Ilic, INESC-ID/IST, Universidade de Lisboa, Portugal
Vitus Leung, Sandia National Laboratories, USA
Hatem Ltaief, KAUST, Saudi Arabia
Farouk Mansouri, DDN, France
Naoya Maruyama, LLNL, USA
Hartmut Mix, Technische Universität Dresden, Germany
Marc Perache, CEA, France
Eric Petit, Intel, France
Didem Unat, Koç University, Turkey

Last modified: 2018-04-16 11:16:16